In response to the success of last year's Solutions Workshops, Doulos and a number of leading EDA vendors joined forces again and presented 4 fast-paced, high-value technical sessions at DAC in San Francisco.

A big thank you goes to our partners who helped us make this year's Solutions Workshops as successful as last year's.

Missed the Solutions Workshops?

Don't worry if you didn't manage to attend - there is still a chance to receive a free copy of the workshop handout containing the presentation slides. Simply send an email request to doris.schulze@doulos.com and we will send you your free booklet in the post.

To view the technical abstracts, click on the following links:


Exploring the Landscape of Advanced Functional Verification Methodology

Presented by Doulos & Mentor Graphics
Abstract


Methodology Guidelines for SystemC Transaction-Level Modeling

Presented by Doulos & CoWare
Abstract


Building Re-usable Verification Components in the Language of Your Choice within a Plan-to-Closure Flow

Presented by Doulos & Cadence
Abstract


Fast Track to SystemVerilog Testbench Productivity with VMM

Presented by Doulos & Synopsys
Abstract