Methodology Guidelines for SystemC Transaction-Level Modeling

Tuesday July 25th, 12:30 - 14:00
Presented by Doulos & CoWare
Registration & Lunch 12:00 - 12:30
Rooms 250 + 262, West Mezzannine
Transaction Level Modeling (TLM) is enabling engineers to do architectural analysis, performance modeling and software execution at an early stage in the System-on-Chip design flow, prior to the availability of RTL code. After a brief overview of TLM in SystemC, this workshop will present an up-to-date view of the proposals for a TLM standard built on top of the existing OSCI transport layer interface. Based on these emerging standards CoWare has developed methodology guidelines for effective transaction-level SystemC modeling of SoC platform components. The modeling methodology will be presented and illustrated with examples.
Registration for attendance at DAC Solutions Workshops is free and open to exhibition visitors as well as conference delegates. Full conference registration is not required.

Online registration is now closed. You can still register at the Doulos booth 3455 in the Moscone North Hall.