Tuesday 7th March, 13:30 - 15:00
Presented by Doulos & CoWare
Lunch 13:00 - 13:30
€50

Transaction Level Modeling (TLM) is enabling engineers to do architectural analysis, performance modeling and software execution at an early stage in the System-on-Chip design flow, prior to the availability of RTL code. After a brief overview of TLM in SystemC, this workshop will present an up-to-date view of the proposals for a TLM standard built on top of the existing OSCI transport layer interface. Based on these emerging standards CoWare has developed methodology guidelines for effective transaction-level SystemC modeling of SoC platform components. The modeling methodology will be presented and illustrated with examples.

Registration
Please note that even delegates who do not wish to attend the full conference must register for the workshops using the DATE 'Conference Delegates Registration' page.

Sponsored Places
CoWare is sponsoring a limited number of places on this workshop. On-line application has now closed. To apply, please visit the CoWare booth during exhibition hours.