March 6-10 2006; Munich, Germany


Following on from the success of last year's DATE Solutions Workshops, and at the special invitation of EDA Exhibitions, Doulos has once again joined forces with a number of leading vendors to create a series of 5 fast paced Solutions Workshops especially for DATE 06.

Presented as part of the official programme in conjuction with DATE 06, the 1½ hour Solutions Workshops offer real value and a great opportunity for engineers to get up to speed with the latest technical information.

The Solutions Workshops are open to both conference and exhibition attendees for the nominal fee of €50 per workshop, including lunch.
Our Solutions Workshop partners are sponsoring a limited number of places. For further details and to apply for a sponsored place, please click on the abstract links below.

Using SystemVerilog Assertions for AXI Bus Verification

Tuesday 7th March, 11:30 - 13:00
Presented by Doulos & Mentor Graphics, endorsed by ARM
Lunch 13:00 - 13:30
Abstract

Methodology Guidelines for SystemC Transaction-Level Modeling

Tuesday 7th March, 13:30 - 15:00
Presented by Doulos & CoWare
Lunch 13:00 - 13:30
Abstract

Verification Methodology in a Mixed Language Environment

Wednesday 8th March, 11:00 - 12:30
Presented by Doulos & Mentor Graphics
Lunch 12:30 - 13:00
Abstract

Using the Verification Methodology Manual (VMM) for SystemVerilog

Wednesday 8th March, 13:00 - 14:30
Presented by Doulos & Synopsys, endorsed by ARM
Lunch 12:30 - 13:00
Abstract

Exploiting Processor Cores in FPGA Designs, Large and Small

Thursday 9th March, 11:00 - 12:30
Presented by ALSE in association with Altera
Lunch 12:30 - 13:00
Abstract