News
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Doulos are pleased to announce three webinars this Autumn as part of their on-going commitment to providing high value, cutting edge KnowHow resources:
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Following the announcement this week by Accellera of version 2.3.0 of its SystemC library, Senior Member of Technical Staff at Doulos, David Black, who chairs the Accellera Systems Initiative Language Working Group, has been talking about the release to Editor of EDA Confidential, Peggy Aycinena.
"Accellera Systems Initiative encourages SystemC users and tool suppliers everywhere to move to the new IEEE 1666 standard," said David. "I would like to recognize the members of the SystemC Language Working Group, which is composed of system and semiconductor engineers, vendors and educators worldwide. We appreciate their contribution to the electronic design community and their diligent work in making this new library possible."
See the full article here:
http://www10.edacafe.com/blogs/whatwouldjoedo/
Also see the official library release details at:
http://www.accellera.org/news/
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ARM Systems Design and Development Conference |
Doulos are pleased to be participating this year in the ARM Systems Design and Development Conference organised by DESIGN & ELEKTRONIK at the Kempinski Hotel Airport in Munich.
Don't miss Doulos' ARM guru, Marcus Harnisch, who will be presenting: CMSIS turn 3.0 at 2.30pm (Session 3) on Wednesday July 11.
Entry to the exhibition is free.
Find out more about ARM and Embedded Training and Scheduled Courses running in Munich on the Doulos web site.
Doulos is pleased to announce that, starting this August, a schedule of leading edge professional training classes will be offered in Bangalore from its extensive and renowned portfolio.
"The high calibre engineers that form the Indian VLSI design community can now benefit from local access to the Doulos high capability training," said Rob Hurley, CEO Doulos, "we plan to play a key part in the drive to increase engineering productivity in India as elsewhere."
Offered in co-operation with verification specialists Test and Verification Solutions India Pvt Ltd, the first classes offered will deliver project ready skills and expert knowhow in SystemVerilog/UVM, the latest ARM Cores, and system level modelling using SystemC and TLM-2.0.
Karthik Nagappan of Test and Verification Solutions commented, "The program of Doulos training will further accelerate the local strength of engineering competence in VLSI design especially in the key domain of verification. We're excited to be partnering Doulos in this initiative."
For fuller details check out www.doulos.com/india
SPECIAL LAUNCH PROMOTION: Synopsys users attending SNUG Bangalore will be given the chance to win a free training place by registering at the Doulos booth. All SNUG attendees will be eligible for an introductory discount.
Doulos is delighted to be providing Silver Sponsorship for SNUG events in 2012.
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Visit the Doulos booth or contact the sales team directly to find out more.
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Doulos are delighted to be exhibiting and providing direct learning opportunities at the 49th Design Automation Conference running from June 3 in San Francisco. On Tuesday at 9.30am, Doulos CTO, John Aynsely will be making a presentation at the Verification Academy booth #1514 on Applying UVM. |
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A lunch and learn workshop: "UVM: Now or Never?" will be presented on Wednesday 6.
There will also be opportunities for one-on-one consultations at Booth #1501 with Doulos industry experts John Aynsley, David Black and Doug Smith for managers reviewing their engineering team's technology and methodology capability.
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Doulos are pleased to announce two new webinars in May as part of their on-going commitment to providing high value, cutting edge KnowHow resources:
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| Doulos is delighted to sponsor the Indian SystemC User Group Conference and Tutorials, taking place this year on April 9th and 10th, at the Hotel Vivanta By Taj, Bangalore. Early bird registration ends March 31st (deadline extended) » |
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In conjunction with Circuit Sutra, Doulos will be presenting a full day of SystemC tutorials on Day 2.
View full Agenda »
The first 50 registrations for the Day 2 tutorials receive a FREE SystemC Golden Reference Guide »
Doulos CTO, John Aynsley, is the first recipient of the Accellera Systems Initiative Technical Excellence Award recognising the outstanding achievements John has made to SystemC's standardisation.
"John's contributions to the SystemC language span the full range of the language and have significantly improved the quality of what is now known as IEEE 1666-2011. Because of his longstanding dedication, John has become known as Mr. SystemC and is seen as a great asset to our community" says Accellera Systems Initiative chair, Shishpal Rawat.
Mr SystemC himself is delighted with the award presented at DVCon 2012, commenting "It is a great honor to be recognized by industry peers who participated with me in the OSCI, IEEE and Accellera Systems Initiative standards organisations".
John receiving his award from Accellera's
Technical Committee Chair Karen Pieper
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Doulos are pleased to announce a new VHDL RapidGain™ using Microsemi training event that will run in the following locations at the end of March, in association with technology partners MSC: March 27th: Zürich Please note the above events will be run in German. |
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