ARM SoC Modelling Using RealView SoC Designer
Standard Level - 3 days
view dates and locationsARM SoC Modelling using RealView SoC Designer is a 3 day Doulos/ARM Partner Course teaching how to use RealView® SoC Designer to model and analyse System on Chip (SoC) designs. The course is intended for two groups of users:
- engineers who need to use RealView SoC Designer for modelling transaction level models of System On Chip (SoC) designs
- engineers who need to develop and integrate new models into the RealView environment
The course comprises 2 modules:
- SoC Simulation using RealView SoC Designer (1 day) provides a good grounding in using RealView SoC Designer for simulating an SoC. This module is suitable for hardware and software engineers who need to use RealView SoC Designer to assess performance of SoC systems.
- Developing IP using RealView (2 days) follows on from day 1, and enables the user to develop models within RealView SoC Designer. It introduces the application programming interfaces (APIs) and covers writing models using these interfaces.
The syllabus covers the use of RealView SoC Designer, writing models to the RealView APIs, simulating transaction level models (TLM models) with ARM processors, the simulation concepts used by RealView SoC Designer to create high speed simulations, and performance analysis of SoC models.
Who should attend?
Hardware and Software Engineers, SoC Architects, and Concept Engineers who wish to learn the use of RealView SoC Designer.What will you learn?
- How to use RealView SoC Designer
- Simulating Hardware and Software together at high speed
- Using RealView SoC Designer to analyse and identify performance bottlenecks
- Writing models to the RealView APIs
- Instrumenting RealView models
- Importing existing models
- Simulating SystemC models (optional)
Pre-requisites
For the full 3-day course delegates should be able to write C code, and have basic knowledge of C++, equivalent to attending the Doulos course Essential C++.Course materials
Doulos Course materials are renowned as the most comprehensive and user friendly available. Their style, content and coverage is unique in the HDL training world and has made them sought after resources in their own right. Course fees include:- Fully indexed course notes creating a complete reference manual
- Workbook full of practical examples to help you apply your knowledge
Structure and Content
SoC Simulation using RealView SoC Designer (day 1)
Introduction
Transaction Level Modelling and Simulation • Levels of Abstraction (CA, CX) • RealView SoC Designer • How RealView SoC Designer are applied to SoC simulation and analysis w Using processor models with RealView SoC Designer • Simulating a CX model.How RealView SoC Designer Works
Cycle-Based Scheduling • Introduction to the Scheduler • Master/Slave Modelling • Types of Ports • Introduction to the APIs (MxPI, MxDI, MxSI) • Launching the RealView debugger • Simulating a CA model • AHB and AXI ModellingDeveloping a Simple Component
Using the Component Wizard •Understanding the code the wizard creates •How to complete the methods• Using Communicate/Update • Writing Slave and Master signal methods• Writing Transaction methods • Compiling and using the component• Running a component model with a simple test harnessEvaluating Alternative Architectures
Evaluating different architectures• Interpreting graphical profiling information •Introduction to MxScript • The Simulator API •Compile and Run Time parameters • Automating multiple runs and controlling the simulator from MxScriptDeveloping IP with RealView SoC Designer (days 2-3)
Understanding the RealView SoC Designer Class Library
The sc_mx_module class •Overview of scheduler methods •How Master Ports work• How Slave ports work• Clocking • Master and slave port classes in detail• Methods you must provide • Methods you do not need to edit • Class hierarchyDeveloping a Complex Component
Creating a Cycle Based Component • Using the update()/communicate() cycle • Creating Zero Time (no clock) Components • Implementing Save/Restore • Hard and Soft Reset • How to Create HierarchyImplementing AHB Components
Mapping a protocol onto function calls • Control Structures • Implementing AHB protocol stages • An introduction to AXI implemtationThe Transaction Interface
The multi-cycle transaction interface • Transaction master ports • Transaction slave ports • Callbacks and notification • The timing table • Transaction properties • UsageAXI Modelling
Header files and properties • The AXI protocol • AXI properties • Example AXI Master • Example AXI Slave • Simulation and display of AXI transactionsThe Debugging Interface
The Debugging API • Default debugging code • Hooking your own code into the debugging system • Using Read/Write ReadDbg/WriteDbg • Introduction to the Debugger Integration PackageThe Profiling Interface
The Profiling API • Hook your code into the profiling API • Launching a debugger • Hooks to disassemblersARM Methodology
Using transactions for AMBA models • Multi-cycle transactions • How transaction information is transferred • Example using AXI(Optional) Using RealView SoC Designer with SystemC
Importing a SystemC Model • The SystemC scheduler vs. the RealView scheduler • Exporting a RealView model for use standalone with SystemC(Optional) Co-simulation with HDL
Co-simulation with VDHL/Verilog • Creating a component • Instancing the foreign component • Launching co-simulationNo public course dates are currently scheduled
Please contact Doulos to schedule a public course to suit you, or to discuss onsite training.
Price on request
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