ARM Cortex-M3 SoC Design
Standard Level - 3 days
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ARM Cortex-M3 SoC Design is a 3-day class for engineers designing hardware based around the ARM Cortex-M3 core. It includes an introduction to the ARM product range and supporting IP, programmer's model, instruction set architecture, AMBA on-chip bus architecture and Cortex-M3 debug architecture. The class includes a number of worked examples developed by ARM® to reinforce the lecture material.
Who should attend?
Hardware design engineers who need to understand the issues involved when designing SoC's around the ARM Cortex-M3 core.
Pre-requisites
Some knowledge of embedded systems and familiarity with digital logic and hardware/ASIC design issues. A basic awareness of ARM is useful but not essential.
Training materials
This class uses training materials developed by ARM®.
Content
- Cortex-M3 Overview
- Cortex-M3 Programmer’s Model
- Cortex-M3 Instruction Set
- Exception Handling
- AHB Protocol
- AHB Interconnection Architecture
- APB
- Cortex-M3 Processor Core
- Cortex-M3 Interfaces
- Memory Types
- Memory Protection and the Memory Map
- Vectored Interrupt Controller
- Initializing the Cortex-M3
- Cortex-M3 Implementation, Configuration and Deployment
- Cortex-M3 Debug Architecture
- Cortex-M3 Trace Architecture
- Cortex-M3 Integration
No public course dates are currently scheduled
Please contact Doulos to schedule a public course to suit you, or to discuss onsite training.
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