Modular SystemVerilog

Customized In-house Training Options

Modular SystemVerilog fulfils the need for customized team-based training at your site.

Don't see the course you want in our SystemVerilog portfolio? Want us to deliver custom SystemVerilog or OVM/UVM training tuned to your precise needs? We can mix-and-match material from the following list of courses and modules (or, indeed, from any other course in our portfolio if that's what you really need):

• Fast-track Verilog for VHDL Users
• Fundamentals of SystemVerilog for Design
• Fundamentals of SystemVerilog for Verification
• SystemVerilog for FPGA/ASIC Design
• SystemVerilog Assertions
• Module-based SystemVerilog Verification
• Class-based SystemVerilog Verification
• SystemVerilog for Designers
• SystemVerilog for Verification Specialists
• OVM Adopter Class
• VMM Adopter Class
• UVM Adopter Class

Based on these modules, team-based and in-house training can be customised to fit the content, scope and duration needed to best-fit your specific requirements, for example:

• Making the transition from Verilog to SystemVerilog
• Making the transition from VHDL to SystemVerilog
• Making the transition from Vera to SystemVerilog
• Making the transition from e to SystemVerilog
• SystemVerilog for hardware designers
• SystemVerilog for verification engineers
• Using SystemVerilog for class-based constrained random verification
• SystemVerilog Assertions for hardware designers and/or verification engineers
• Learning SystemVerilog with OVM, the Open Verification Methodology
• Learning SystemVerilog with UVM, the Universal Verification Methodology

Just give us a call.

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