-- +----------------------------+
-- | Copyright 1997-2008 DOULOS |
-- +----------------------------+

library IEEE;
use IEEE.std_logic_1164.all;

entity spectrum_spreader is
port (
  RF_data : in std_logic;
  clock : in std_logic;
  reset : in std_logic;
  spread_data : out std_logic
);
end;

architecture both_edges of spectrum_spreader is

  signal state_pos : std_logic;
  signal state_neg : std_logic;
  signal state_toggle : std_logic;

begin

  SVR_pos : process (clock, reset)
  -- this flip-flop toggles when state_neg is 1 during state_toggle HIGH
  -- but then toggles on each clock when state_toggle is LOW
  begin
    if reset = '0' then
      state_pos <= '0';
    elsif clock'event and clock='1' then
      if state_toggle = '1' then
        if state_neg = '1' then
          state_pos <= not state_pos;
        end if;
      else -- state_toggle = '0'
        state_pos <= not state_pos;
      end if;
    end if;
  end process;

  SVR_neg : process (clock, reset)
  -- this is simply a toggle flip-flop with reset
  begin
    if reset = '0' then
      state_neg <= '0';
    elsif clock'event and clock='0' then
      state_neg <= not state_neg;
    end if;
  end process;

  fsm_toggle : process (state_neg, reset)
  -- toggles on the +ve edge of state_neg when state_pos LOW
  begin
    if reset = '0' then
      state_toggle <= '0';
    elsif state_neg'event and state_neg='1' then
      if state_pos = '0' then
        state_toggle <= not state_toggle;
      end if;
    end if;
  end process;

  output: spread_data <= (state_pos xor state_neg) xor RF_data;

end both_edges;