News
Doulos is proud to partner with Aldec to present their AVMS Webinar series - Focusing on today's popular verification topics, the AVMS Webinar series
provides design engineers with in-depth emerging verification trends and technologies in an "engineer to engineer" format. Webinars include:
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Doulos announces new RapidGain™ series of 1 day training events - Engineers can now experience the benefit of Doulos RapidGain™ series of stand-alone training events.
Delivering unique opportunities to obtain experience and understanding in ‘need-to-know’ areas, in an accessible, hands-on
1-day format. New to the RapidGain™ series are:
1-day format. New to the RapidGain™ series are:
Doulos and CoWare Expand Collaboration - Engineers can now experience the benefit of Doulos training classes in ARM processor architecture and embedded system design using standards-based SystemC virtual platforms created within CoWare's ESL 2.0 solution for platform architecture design - including classroom access to CoWare Platform Architect and the breadth of ARM IP models available in the CoWare Model Library. Read the full press release here >>
NEW OVM Golden Reference Guide - supporting OVM version 1.1. The OVM Golden Reference Guide provides a compact, concise reference to OVM, the Open Verification Methodology for SystemVerilog. The aim is to provide a practical, hands-on reference that complements the official OVM Class Reference. Packed with tips gleaned from Doulos's experience using OVM, the OVM GRG will help you find the information you really need. For further details about the OVM GRG, see here >>
First public schedule for independent Open Verification Methodology (OVM) training announced - The first independent training in both the US and Europe for OVM is now available. Public courses have been scheduled in 5 locations:
The OVM Adopter Class was developed by Doulos as the result of early co-operation with both the Cadence and Mentor OVM development teams. This full scope 3 day training delivers the significant value-add of a fully independent and vendor-neutral perspective on how to adopt and implement OVM.
- Austin April 8 - 10 & July 9 - 11
- Boston April 29 - 1 May
- San Jose May 13 - 15 & August 27 - 29
- Munich & Cambridge April 28 - 30 & July 14 - 16
The OVM Adopter Class was developed by Doulos as the result of early co-operation with both the Cadence and Mentor OVM development teams. This full scope 3 day training delivers the significant value-add of a fully independent and vendor-neutral perspective on how to adopt and implement OVM.
Doulos announces a SystemC 'World's First'. Underlining our global lead in the development and delivery of SystemC training services, Doulos has created the world's first tutorial series on SystemC TLM-2. Aimed at existing SystemC users, it provides the ideal introduction to the new Transaction Level Modelling standard, which will enable model interoperability and reuse at the transaction level. The public review of TLM-2 was completed at the end of January, and is now planned for release (by OSCI) mid 2008.
World Exclusive! - SystemVerilog OVM Tutorials. Doulos is making available online tutorials which will help you to understand some of the most important features of OVM.
The first of these tutorials is available NOW!
Check it out here.
ARM appoints Doulos as an Approved Training Partner in North America. A long-standing and successful training partner in Europe for ARM, Doulos has already delivered ARM1176 processor training to many of the world's most successful companies. This appointment means Doulos can extend its Modular ARM System Design training concept - which includes the recently released Cortex-M3 processor training class, to ARM Licensees in the US. Read the full press release here >>
Professional FPGA Designer Programme addresses critical design needs.
European Engineers tackling designs using Altera or Xilinx devices and tools now have a much needed answer to their design problems. Altera Professional Designer™ and Xilinx Professional Designer™ programmes provide the best combination of HDL, design flow and techncial training modules. Engineers and their managers can now optimise time invested in training and achieve ellusive design performance goals. Find out more about individual classes here >>
European Engineers tackling designs using Altera or Xilinx devices and tools now have a much needed answer to their design problems. Altera Professional Designer™ and Xilinx Professional Designer™ programmes provide the best combination of HDL, design flow and techncial training modules. Engineers and their managers can now optimise time invested in training and achieve ellusive design performance goals. Find out more about individual classes here >>
Page last updated 15 August 2008.
