Tuesday 16 October 2018

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The Keys to SystemC & TLM-2.0: How to be Successful

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Webinar Overview:

SystemC has become well-established as the language of choice for system modeling and virtual platform creation and integration, and is now being applied successfully for high level synthesis. SystemC models also frequently appear as reference models in the hardware verification flow.

This session is aimed at hands-on hardware or software engineers who might know Verilog or C but have no previous experience of SystemC. It will explain what you need to know to be successful with SystemC by exploring some fundamental questions including:

What is SystemC and how is it used? What does modern SystemC code look like? What differentiates SystemC from SystemVerilog? What use cases best fit SystemC? What is TLM? Where can I learn more?

David C Black The one-hour training session will be presented by David C Black, Doulos Senior Member, Technical Staff and co-author of "SystemC: From the Ground Up".







What is SystemC?
Developed by a group of companies forming the Open SystemC Initiative (OSCI), SystemC is a C++ class library typically used to model systems that have hardware and software content at the transaction level of abstraction.



SystemC training and resources available NOW from Doulos:





Scheduled Training from Doulos:
Comprehensive SystemC
Dates / info / register »
SystemC Modeling Using TLM-2.0
Dates / info / register »
View full training schedule »  
Please contact Doulos to schedule a public course to suit you, or to discuss onsite training.

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