David has been a key member of the Doulos technical team since 2001, specialising in Hardware Description Language-based design and verification.
As well as developing, writing and presenting training courses in leading-edge methodologies for FPGA, ASIC and SoC design and verification, David regularly contributes to technical papers, tutorials and conference presentations at major industry events world-wide. He has also provided project support and consultancy for industrial clients in the fields of digital/mixed-signal IC design and verification.
Courses taught include: SystemVerilog, SystemC, UVM, OVM, VHDL, Verilog, VHDL-AMS, Perl and C++
David was co-author of the IEEE Standard 1666-2005 SystemC Language Reference Manual and is currently writing an LRM for the SystemC Control, Configuration and Inspection (CCI) working group.
Before joining Doulos, David worked for 10 years at a UK university where he was a Senior Lecturer in Microelectronics. In total, he has over 25 years experience of electronics design and verification in both industry and academia.
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