News
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This month EDN Europe has published Transform slow software into fast hardware with Vivado HLS by David C. Black - Doulos Senior Member, Technical Staff. |
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Doulos is pleased to announce three webinars this September as part of their on-going commitment to providing high value, cutting edge KnowHow resources. |
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- Friday October 10th, 2014:
Getting Zynq up and running with your VHDL IP » - Friday October 17th, 2014:
Easier UVM – Making Verification Methodology more Productive » - Friday October 31st, 2014:
The Keys to SystemC & TLM-2.0: How to be Successful »
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Doulos is pleased to announce three webinars this September as part of their on-going commitment to providing high value, cutting edge KnowHow resources. |
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- Thursday September 25th, 2014:
ARM AAME Essentials »
- Friday September 26th, 2014:
Beyond the GUI: Using Tcl to enhance your EDA experience »
Doulos is delighted to again be providing GOLD Sponsorship for SNUG events in 2014.
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Visit the Doulos booth or contact the sales team directly to find out more.
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Doulos was delighted with an increase of 16% in attendance at Thursday is Training Day, compared to the last year. |
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Get more information about Doulos training courses and book online
| Doulos is delighted to announce that John Aynsley, CTO at Doulos, will be chairing the Roundtable discussion at the Accellera annual DAC Breakfast on June 3rd. John will engage a panel of experts in a lively discussion of topics including UVM usage, the upcoming UVM 1.2 standard, migration planning, potential future enhancements to UVM, and more. John and the panel will also address questions from the audience. |
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Doulos is delighted to announce that for the second year running, it will be the official training provider at DAC 2014 (June 1 - 5) at the Moscone Center, San Francisco. |
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Doulos is pleased to announce three webinars this spring as part of their on-going commitment to providing high value, cutting edge KnowHow resources. |
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- Friday April 25th, 2014:
Transform Slow Software into Fast Hardware on a Zynq® All Programmable SoC using Vivado® HLS and SystemC/TLM-2.0 »
- Friday April 30th, 2014:
Software development from ARM Cortex-M to Cortex-A »
- Friday May 9th, 2014:
VHDL vs SystemVerilog vs SystemC »
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Doulos is again participating in DVCon 2014, at the DoubleTree hotel, San Jose starting on March 3rd. |
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| Doulos is delighted to announce an extended programme of Expert-Led Online Training Courses supporting engineers using Xilinx Vivado (including High Level Synthesis), Zynq and 7-Series FPGA devices.
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