Doulos release SystemVerilog Golden Reference Guide.
DATE 03 Munich, Germany, 4 March 2003. Joining Golden Reference Guides for languages such as VHDL, Verilog®, SystemC™ and e, a new pocket size reference guide has been released for SystemVerilog, the emerging system level design language derivative of Verilog®. Developed and published by independent methodology training specialist Doulos, the guide is a compact, handy reference to the language and its use.
Rob Hurley, Business Manager for Doulos, said, "The release of the Golden Reference Guide for SystemVerilog is the first step in our commitment to track the development and application of SystemVerilog. It will be followed shortly and supplemented by an advanced training course for existing Verilog users who want to evaluate the SystemVerilog superset."
"Accellera is pleased to see the Doulos leadership to drive SystemVerilog education and adoption," said Dennis Brophy, chairman of Accellera. "SystemVerilog represents the next generation of evolution to the Verilog language. As it is enhanced to support system design and advances in verification, it is important that the trusted and recognized experts in training and education offer courses and reference material for the engineering community."
Doulos is the European leader for independent know-how in leading edge methodologies for SoC, FPGA/CPLD and ASIC design. Our in-house expertise supports training and project services in VHDL, Verilog®, SystemCTM, Handel-C, Perl, Tcl/Tk, e and design verification. Public courses are delivered in the local languages in the UK, France and Germany, with onsite courses delivered worldwide.
Contact: +44 (0) 1425 471223.
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