Arm Cortex-A15 MPCore SoC Design
Duration: 3 daysview dates and locations
This course is designed for those who are designing hardware based around the Arm® Cortex®-A15 MPCore processor.
Who should attend?
Hardware design engineers who need to understand the issues involved when designing SoCs around the Arm Cortex-A15 MPCore processor.
- Comprehensive knowledge of the Armv7-A architecture (For students who do not have the pre-requisite knowledge of the Armv7-A architecture and AMBA, we provide an optional one-day introductory course on these subjects)
- Familiarity with the AMBA on-chip bus architecture
- Knowledge of embedded systems
- Experience with digital logic and hardware/ASIC design issues
This class uses training materials developed by Arm®
- Cortex-A15 Processor Overview
- Cortex-A15 Processor Core
- TrustZone Overview
- Cortex-A15 Memory Management Unit
- Cortex-A15 Clocks and Resets
- Cortex-A15 Power Management
- Introduction to AMBA 3
- Cortex-A15 AMBA 4 Overview
- CCI-400 Cache Coherent Interconnect
- Cortex-A15 Memory Subsystems
- Cortex-A15 System Design Considerations
- Cortex-A15 Debug
- Cortex-A15 Implementation & Configuration
- Cortex-A15 Power Domain Implementation
- Cortex-A15 Booting
- Cortex-A15 DFT & MBIST
- Cortex-A15 Integration Summary
Looking for team-based training, or other locations?
Complete an on-line form and a Doulos representative will get back to you »Back to top