Arm Cortex-A15 MPCore Software Design
Duration: 4 daysview dates and locations
This training course covers the issues involved in developing software for platforms powered by the Arm® Cortex®-A15 application processors.
The learning is reinforced with unique Lab exercises (using the Arm DS-5) which cover assembly programming, exception handling and the general steps required for bringing a complete bare metal system to life.
Who should attend?
This course is aimed at software developers writing low level and bare-metal code for Armv7-A processors, concentrating on the Cortex-A15 processor.
Delegates should have some knowledge of embedded systems, and a basic understanding of embedded programming in C and assembler. Knowledge of earlier Arm architectures is an advantage but not required.
This class uses training materials developed by Arm®
Arm Architecture Fundamentals. Recommended for audiences developing low level code on Arm for the first time. This optional day introduces the Armv7-A ISA, exception model and memory model.
- Arm Architecture
- Arm Processor Cores
- Arm System Design
- Writting Software for Arm Processors
Note: For delegates who already have a good understanding of the Arm processors' architecture and general programmer's model, it may be appropriate to start on Day 2. Please discuss this option with your local Doulos team prior to booking.
- Cortex-A15 MPCore Overview
- Armv7-A Assembly Intruction Set
- Configuring Caches and Branch Prediction
- Using the MMU
- Introduction to TrustZone
- Multi-Processors/Threads Synchronization
- Programming the Interrupt Controller (GIC)
- Cortex-A Power Management
- Maintaining Cache Coherency
- Exception Handling
- OS Support
- Synchronization Barriers
- Multi-Cluster Programming
- Booting a Cortex-A15 MPCore
- Writing C for Arm
- Virtualization in Cortex A-15
- Performance Monitoring Unit and Trace Functionalities
- NEON Co-Processor Overview
The Cortex-A15 MPCore has been purposely designed to work in tandem with the a Cortex-A7 MPcore cluster whilst relying on automated data cache coherency management. For Cortex-A15 MPCore software classes run on-site, we offer the possibility to include the Cortex-A7 specific sections to provide a rounded view of a big.LITTLE system on chip configuration.
The learning is reinforced with practical exercises using the Arm DS-5 software development platform and covers assembly programming and bringing a complete bare metal system to life.
Lab exercises for assembly programming cover the concepts of data transfer, data processing, flow control and DSP instructions.
Additional exercises show the main steps involved in bringing a bare metal system to life, including the configuration of the various mode stacks and the creation of an exception handler. These exercises make use of the assembler and linker as well as the interactive debugger.
Looking for team-based training, or other locations?
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