Wednesday 14 November 2018

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ARM Cortex-A57 MPCore SoC Design

Duration: 3 days

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This course is designed for those who are designing hardware based around the Cortex-A57 MPCore processors. It includes a one-day introductory course on the ARMv8-A architecture and AMBA.

Who should attend?

Hardware design engineers who need to understand the issues involved when designing SoCs around the ARM Cortex-A57 MPCore processor.

Pre-requisites

  • Knowledge of embedded systems
  • Experience with digital logic and hardware/ASIC design issues

Training materials

This class uses training materials developed by ARM®

Content

  • Cortex-A57 MPCore Overview
  • Cortex-A57 CPU Core
  • Cortex-A57 MPCore Memory Subsystems
  • Cortex-A5x MPCore MMU
  • CCI-400 Cache Coherent Interconnect (or CCN-504 Cache Coherent Network)
  • Cortex-A5x Generic Interrupt Controller
  • Cortex-A57 MPCore Clock & Resets
  • Cortex-A57 MPCore Power Management
  • Cortex-A57 MPCore Debug
  • Cortex-A57 MPCore Configuration
  • Cortex-A5x MPCore Booting
  • Cortex-A57 MPCore Implementation & DFT
  • Cortex-A57 MPCore Integration

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