Tuesday 7 July 2020

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Arm Cortex-A7 MPCore SoC Design

Duration: 3 days

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This course is designed for those who are designing hardware based around the Arm® Cortex®-A7 MPCore processor.

Who should attend?

Hardware design engineers who need to understand the issues involved when designing SoCs around the Arm Cortex-A7 MPCore processor.


  • Comprehensive knowledge of the Armv7-A architecture (For students who do not have the pre-requisite knowledge of the Armv7-A architecture and AMBA, we provide an optional one-day introductory course on these subjects)
  • Familiarity with the AMBA on-chip bus architecture
  • Knowledge of embedded systems
  • Experience with digital logic and hardware/ASIC design issues

Training materials

This class uses training materials developed by Arm®


  • Cortex-A7 Processor Overview
  • Cortex-A7 Processor Core
  • TrustZone Overview
  • Cortex-A7 Memory Management Unit
  • Cortex-A7 Clocks and Resets
  • Cortex-A7 Power Management
  • Introduction to AMBA 3
  • Cortex-A7 AMBA 4 Overview
  • CCI-400 Cache Coherent Interconnect
  • Cortex-A7 Memory Subsystems
  • GIC-400
  • Cortex-A7 System Design Considerations
  • Cortex-A7 Debug
  • Cortex-A7 Implementation & Configuration
  • Cortex-A7 Power Domain Implementation
  • Cortex-A7 Booting
  • Cortex-A7 DFT & MBIST
  • Cortex-A7 Integration Summary

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