ARM Cortex-R5 Software Design
Standard Level - 3 daysview dates and locations
This training course covers the issues involved in developing software for platforms powered by the ARM Cortex-R5 processor.
Who should attend?
Software engineers designing applications for platforms based around the ARM Cortex-R5 processor Core. Much of the content is relevant to users of 3rd party tools but we cannot undertake to cover them in any detail.
Delegates should have a basic understanding of microprocessor systems and be familiar with assembler or C programming. A basic awareness of ARM and experience of embedded system development is helpful, but not essential.
This class uses training materials developed by ARM.
Introduction to the ARM ArchitectureArchitecture versions • Registers and instruction sets • Exception model • Memory model • Coprocessors • Architecture extensions
ARM Tools OverviewARM DS-5 • Tool Licensing • GNU and ABI • Debug Interfaces
Assembler Programming for ARM ProcessorsLoad/Store Instructions • Data Processing Instructions • Flow Control • Miscellaneous • DSP
Exception HandlingExceptions overview • Interrupts sources and priorities • Abort Handlers • SVC Handlers • Undef Handlers • Reset Handlers
ARM Caches and TCMsCache basics • Caches on ARM processors • Tightly Coupled Memory (TCM) • Optimization consideration
Using the MPUMemory Management Introduction • Access Permissions and Types • Memory Protection Unit (MPU) • Optimizations & Issues
C/C++ Compiler Hints & TipsBasic Compilation • Compiler Optimizations • Coding Considerations • Local and Global Data issues
Linker & Libraries Hints & TipsLinking Basics • System and User Libraries • Veneers and Interworking • Linker Optimizations and Diagnostics • ARM Supplied Libraries
Debug and ProfilingInvasive Debug • Non-Invasive Debug • PMU • Trace
Software Engineers' Guide to the Cortex-R5Introduction • Twin CPU support • L1 memory system • Error detection • Instruction set changes
Further Compiler/Linker Hints & TipsMixing C/C++ and Assembler • Stack Issues • VFP/NEON • Advanced Building Facilities Embedded Software Development
Embedded Software DevelopmentAn "Out-of-the-box" build • Tailoring the C library to your target • Tailoring image memory map to your target • Reset and Initialization • Further memory map considerations • Building and debugging your image
Power Management for Cortex-A/R CoresProcessor Power Consumption • Power Modes • NEON and MPCore
Debug and TraceDebug Logic Overview • Debug Logic Features • Tools use of Debug Logic • Trace Logic Overview • Debug vs. Trace • System Level Debug Infrastructure • CoreSight Introduction CoreSight Debug • CoreSight Trace
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