Developing with Arm Cortex-M
Standard Level - 4 daysview dates and locations
Project-ready training for product development based on platforms incorporating Arm® microcontroller IP (including Arm Cortex®-M7)
This course is designed for engineers developing software for platforms based around Arm Cortex-M Series processors with v7-M architecture. The course includes an introduction to the Arm product range and supporting IP, the processor core, programmers' model, instruction set and debug architecture. It includes a number of worked examples and hands-on CMSIS compliant exercises to reinforce the training material. It also includes content on the very latest Armv7-M Series cores including the M7.
Who should attend?
Software engineers writing application and system software for platforms using the Arm Cortex-M processor cores: M0, M0+, M3, M4 and M7.
- Some knowledge of embedded systems
- Basic awareness of Arm is useful but not essential
- C programming for Embedded Systems training (or equivalent C programming knowledge)
- Experience of assembler programming is not required but would be beneficial
This class is based on source training material developed by Arm themselves, augmented with supplemental content and labs developed by Doulos. Doulos is a global Arm Approved Training Center.
The majority of the course content and sessions are relevant and of value for engineers developing products using platforms based on the current Cortex-M Series family with Armv7-M architecture. In public class delivery contexts, the specific agenda followed may vary from that indicated below dependent on the focus and interests of the course participants attending that event. Upon registration, course participants will be asked to indicate which specific M Series core they are focusing on, which will steer the class agenda to some degree.
Note the course includes a valuable comparison of capabilities and application variance between different members of the M Series family which will be of benefit to evaluators as well as those preparing for project.For private team-based training for software developers, the course can be focused entirely on a specific M Series core. The course descriptions for these courses can be found below:
- Arm Cortex-M0 Software Design
- Arm Cortex-M0+ Software Design
- Arm Cortex-M3/M4 Software Design
- Arm Cortex-M7 Software Design
For private team based training for system designers and integrators, there are also course options available:
- Arm Cortex-M0 SoC Design
- Arm Cortex-M0+ SoC Design
- Arm Cortex-M3/M4 SoC Design
- Arm Cortex-M7 SoC Design
The following is representative of the public class agenda followed which includes participants requiring content covering M7 capability as well as M4, M3 and M0.
Introduction to ArmArm as a company • Processor portfolio • Supported architectures • Processor profiles
Cortex-M OverviewBlock diagram • Architectural features • Instruction set • Programmer's model • Memory map • Memory interfaces • Caches • Exception handing • Memory protection • Power management • Implementation options
Tools Overview for Arm MicrocontrollersKeil MDK • ULINK/DSTREAM debug adapters • Development boards • DS-5
Cortex-M Programmers' ModelData types • Core registers • Modes, privileges and stack • Exceptions • Instruction set overview
Assembly ProgrammingData processing instructions • Load/Store instructions • Flow control • Miscellaneous instructions
Armv7-M Exception HandlingException Model • Interrupts • Writing the vector table and interrupt handlers • Internal exceptions and RTOS support • Fault exception
Armv7-M Memory ModelMemory address space • Memory types and attributes • Alignment and endianness • Barriers
Understanding BarriersData memory barrier • Data synchronization barrier • Instruction synchronization barrier • Barrier applications examples
Embedded Software DevelopmentDefault compilation behavior • System startup • Tailoring the image memory map to a device • Post startup initialization • Tailoring the C library to a device • Building and debugging an image
Armv7-M Compiler Hints & TipsBasic Compilation • Compiler optimisations • Coding considerations • Mixing C/C++ and assembly • Local and global data issues
Armv7-M Linker and Libraries Hints & TipsLinking basics • System and user libraries • Veneers • Stack issues • Linker optimisations and diagnostics • Arm supplied libraries
Armv7-M SynchronizationIntroduction to synchronization and semaphores • Exclusive accesses • Bit-banding
Extensions (M4/M7)DSP • Floating Point
Armv7-M DebugCoresight and debug access port DAP • Debug event and reset • Flash patch and breakpoint unit (FPB) • Data watch point and trace unit (DWT) • Instrumentation trace macrocell (ITM) • Embedded trace macrocell (ETM) • Trace port interface unit (TPIU)
Appendix (Selectively covered depending on time budget)
CMSIS OverviewCMSIS-Core • CMSIS-DSP • CMSIS-RTOS • CMSIS-SVD • CMSIS-DAP
Armv7-M Memory ProtectionMemory protection overview • Regions overview • Regions overlapping • Setting up the MPU
Cortex-M Level 1 Sub-Systems (M7)Caches • Tightly coupled memory (TCM) • System considerations
Introduction to AMBA ProtocolsAXI • AHB • APB
ExercisesOur hands-on exercises are provided as a self contained virtual machine that can easily be taken away by the students by the end of the class. Our virtual machine works on most operating systems and features a full pre-configured embedded development environment based in industry de-facto standards such as GNU tools and Eclipse. The laboratories work both on pre-installed instruction set simulators and microcontroller development boards. Currently, project files support the STM32 and FRDM boards. Infineon and Texas Instrument boards are currently supported by the tool suite but project files are to be added in the near future.
For our onsite classes, we offer the option to run the laboratories inside Kiel uVision with the Infineon X2Go (XMC1100) development board.
The exercises cover a large spectrum of topics; Starting with assembly programming, data transfers, data processing, flow control, digital signal processing. Exception handling with the implementation priority schemes and pre-emption. Mixing C and assembly to provide a semi-hosted solution.
Board support list
- ST NUCLEO STM32F411E (inc. labs)
- ST NUCLEO STM32F103RB (inc. labs)
- NXP FRDM-KL46Z (inc. labs)
- NXP FRDM-KL25Z (inc. labs)
- Infineon XMC1100 (Keil uVision ONLY)
Arm® and Cortex® are registered trade marks of Arm Holdings Plc.
|September 14th, 2020||Munich, DE||Enquire|
|September 21st, 2020||Paris, FR||Enquire|
|September 29th, 2020||Ringwood, UK||Enquire|
|October 13th, 2020||Stockholm, SE||Enquire|
|October 13th, 2020||Copenhagen, DK||Enquire|
|indicates CONFIRMED TO RUN courses.|
Looking for team-based training, or other locations?
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