Arm Cortex-M7 Software Design
Standard Level - 4 days
view dates and locationsThis course is designed for engineers developing software for platforms based around the Arm® Cortex®-M7 processor. The course includes an introduction to the Arm product range and supporting IP, the processor core, programmers' model, instruction set and debug architecture. It includes a number of worked examples and hands-on CMSIS compliant exercises to reinforce the training material.
Who should attend?
Software engineers writing application and system software for platforms using the Arm Cortex-M7 processor core.
Pre-requisites
- Some knowledge of embedded systems
- Basic awareness of Arm is useful but not essential
- Knowledge of programming in C
- Experience of assembler programming is not required but would be beneficial
Training materials
This class uses training materials developed by Arm.
Content
Day 1
Introduction to Arm
Arm as a company • Processor portfolio • Supported architectures • Processor profilesCortex-M7 Overview
Block diagram • Architectural features • Instruction set • Programmer's model • Memory map • Memory interfaces • Caches • Exception handing • Memory protection • Power management • Implementation optionsArmv7-M Programmers’ Model
Data types • Core registers • Modes, privileges and stack • Exceptions • Instruction set overviewTools Overview for Arm Microcontrollers
Keil MDK • ULINK/DSTREAM debug adapters • Development boards • DS-5CMSIS Overview
CMSIS-Core • CMSIS-DSP • CMSIS-RTOS • CMSIS-SVD • CMSIS-DAPDay 2
Armv7-M Assembly Programming
Data processing instructions • Load/Store instructions • Flow control • Miscellaneous instructionsArmv7-M Memory Model
Memory address space • Memory types and attributes • Alignment and endianness • BarriersCortex-M7 Level 1 Sub-Systems
Caches • Tightly coupled memory (TCM) • System considerationsDay 3
Armv7-M Exception Handling
Exception Model • Interrupts • Writing the vector table and interrupt handlers • Internal exceptions and RTOS support • Fault exceptionArmv7-M Compiler Hints & Tips
Basic Compilation • Compiler optimisations • Coding considerations • Mixing C/C++ and assembly • Local and global data issuesArmv7-M Linker and Libraries Hints & Tips
Linking basics • System and user libraries • Veneers • Stack issues • Linker optimisations and diagnostics • Arm supplied librariesDay 4
Armv7-M Synchronization
Introduction to synchronization and semaphores • Exclusive accesses • Bit-bandingEmbedded Software Development
Default compilation behavior • System startup • Tailoring the image memory map to a device • Post startup initialization • Tailoring the C library to a device • Building and debugging an imageArmv7-M Debug
Coresight and debug access port DAP • Debug event and reset • Flash patch and breakpoint unit (FPB) • Data watch point and trace unit (DWT) • Instrumentation trace macrocell (ITM) • Embedded trace macrocell (ETM) • Trace port interface unit (TPIU) • Implementation detailsArmv7-M Memory Protection
Memory protection overview • Regions overview • Regions overlapping • Setting up the MPULab Exercises:
Keil MDK Introductory Workbook • Armv6-M and Armv7-M Assembly Language Workbook • Arm Compiler and Linker Workbook • Embedded Software Development WorkbookArm® and Cortex® are registered trade marks of Arm Holdings Plc.
This course content is fully covered by the scheduled Doulos training class "Developing with Arm Cortex-M". Please enquire using the links below or contact your local Doulos office to discuss your specific requirements.| Course Dates: | |||
|---|---|---|---|
| September 21st, 2020 | Paris, FR | Enquire | |
| October 26th, 2020 | Ringwood, UK | Enquire | |
| October 26th, 2020 | Munich, DE | Enquire | |
| November 10th, 2020 | Ringwood, UK | Enquire | |
| indicates CONFIRMED TO RUN courses. | |||
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