Thursday 19 October 2017

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ARM Cortex-M7 SoC Design

Standard Level - 3 days

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This course is designed for those who are designing hardware based around the ARM® Cortex®-M7 core. Including an introduction to the ARM product range and supporting IP, the course covers the ARMv7-M instruction set and exception handling, Cortex-M7 implementation, power management, memory protection and AMBA on-chip bus architecture. The Cortex-M7 debug architecture is also covered. The course includes a number of worked examples to reinforce the lecture material.

Who should attend?

Hardware design engineers who need to understand the issues involved when designing SoC's around the ARM Cortex-M7 core.

Pre-requisites

  • Some knowledge of embedded systems
  • Familiarity with digital logic and hardware/ASIC design issues
  • A basic awareness of ARM is useful but not essential

Training materials

This class uses training materials developed by ARM. Doulos is a global ARM Approved Training Center.

Content

  • Cortex-M7 Overview
  • ARMv7-M Programmers’ Model
  • ARMv7-M Assembly Programming
  • Cortex-M7 Processor
  • AHB-Lite
  • APB
  • AXI Protocol
  • AXI Interconnection Architectures
  • Cortex-M7 L1 Sub-Systems
  • Cortex-M7 L2 Interfaces
  • Cortex-M7 Clocks, Resets, Power
  • ARMv7-M Exception Handling
  • SysTick Timer
  • ARMv7-M Memory Model
  • ARMv7-M Memory Protection Unit
  • Introduction to CoreSight
  • ARMv7-M Debug
  • Cortex-M7 Implementation
  • Cortex-M7 Integration
  • ARMv7-M Extensions (Optional)

 

ARM and Cortex are registered trade marks of ARM Holdings Plc.

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