Sunday 19 May 2019

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Arm Cortex-R52 Software Design

Standard Level - 3 days

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This course is designed for engineers developing software for platforms based around the Arm® Cortex®-R52 processor. The course includes an introduction to the Arm product range and supporting IP, the Cortex-R52 core, programmers' model, virtualization features, instruction set and debug architecture. The course includes a number of hands-on practical exercises covering both assembly and C programming to reinforce the lecture material.

Who should attend?

This course is designed for software engineers writing application and system software for platforms using the Cortex-R52 processor.

Pre-requisites

  • C programming for Embedded Systems training (or equivalent C programming knowledge)
  • Experience of assembler programming is not required but would be beneficial
  • Some knowledge of embedded systems
  • A basic awareness of Arm is useful but not essential

Training materials

The training materials for this class are based on Arm's own material.
Doulos is a global Arm Approved Training Center.

Content


Day 1


  • Armv8-R Architecture Overview
  • Core registers • Exception model • Instruction sets • Memory model • Coprocessors • Virtualization
  • Software Engineer's Guide to Cortex-R52
  • Cortex-R52 Overview • Memory system • Safety features • Multiprocessing features
  • ISA Overview
  • Load/Store instructions • Data Processing instructions • Flow Control instructions • Misc instructions • DSP instructions • New A32 / T32 instructions
  • Exception Handling
  • Introduction • Interrupts • Abort Handlers • SVC Handlers • HVC / Trap Handlers • Undef Handlers • Reset Handlers

Day 2


  • Caches and TCMs
  • Cache basics • Caches on Arm processors • Tightly Coupled Memory (TCM) • Optimization considerations
  • Armv8-R Using the Memory Protection Unit
  • Memory types • Memory attributes • Alignment & Endianess • Armv8-R MPU
  • Armv8-R Synchronization
  • Synchronization in Armv8-R • Local and Global Exclusive Monitors • Hardware clock gating
  • Understanding Barriers
  • Data barriers • Instruction barriers • Barriers in Armv8-R

Day 3


  • Armv8-R Virtualization
  • Introduction to virtualization • What and why • Virtualization in Armv8-R
  • Writing C for ARM
  • Parameter passing • Floating point linkage • Alignment • Coding considerations
  • Booting a Cortex-R52 Processor
  • Overview • Booting a single core • Booting a cluster
  • GICv3 Programming
  • Interrupts and interfaces • Configuring interrupts SPIs, PPIs and SGIs • Handling interrupts • Software generated interrupts • Power management • Virtualization
  • Armv8-R Debug
  • Introduction to Debug • Types of Debug • Debug Facilities • External Debug • Self-hosted Debug • CoreSight • Debug Features • Trace

Lab exercises

  • Assembly Programming Workbook
  • C Programming Workbook
  • GIC Programming Workbook


Arm and Cortex, are registered trade marks of Arm Holdings Plc.


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