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Embedded Systems Hardware and Software Design, 6 Series FPGAs

Embedded Systems Hardware and Software Design for 6 Series FPGAs is offered by Doulos in a cost effective 3 day format, which combines the key features of Embedded Systems Design and Embedded Systems Software Design.

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Embedded Systems Design, 6 Series FPGAs

Course Description

Xilinx FPGAs provide a new level of system design capabilities through soft MicroBlaze™ processors, hard PowerPC® processors, AXI interconnect, and silicon-efficient architectural resources. This course brings experienced FPGA designers up to speed on developing embedded systems using the Embedded Development Kit (EDK). The features and capabilities of the Xilinx MicroBlaze soft processor are also included in the lectures and labs. The hands-on labs provide experience with the development, debugging, and simulation of an embedded system.

Training Duration

2 days

Who Should Attend?

Engineers who are interested in embedded systems design training on the Xilinx MicroBlaze soft processor using the Embedded Development Kit and a Xilinx FPGA.

Prerequisites

  • FPGA design experience
  • Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
  • Basic understanding of C programming
  • Some HDL modeling experience

Software Tools

  • Xilinx ISE Design Suite: System Edition 13.1

Hardware

  • Architecture: Spartan®-6 and Virtex-6 FPGAs*
  • Demo board: Spartan®-6 FPGA SP605 or Virtex®-6 FPGA ML605 board*
* This course focuses on the Spartan-6 and Virtex-6 architectures. Please contact Doulos for the specifics of the in-class lab board or other customizations.

Skills Gained

After completing this comprehensive training, you will know how to:
  • Describe the various tools that encompass the Xilinx Embedded Development Kit (EDK)
  • Rapidly architect an embedded system containing a MicroBlaze processor and Xilinx-supplied AXI architecture IP by using the Base System Builder (BSB)
  • Utilize the Eclipse-based Software Development Kit (SDK) to develop software applications and debug software
  • Create and integrate your own IP into the Project Navigator environment
  • Simulate your own custom peripherals with Bus Functional Models (BFMs)

Course Outline

Day 1

The MicroBlaze processor labs are based on the AXI interconnect.
  • EDK Overview
  • Base System Builder
  • Lab 1: Hardware Construction with the Base System Builder
  • Software Development Using SDK
  • Lab 2: Adding and Downloading Software
  • Missing the Bus – Making Connections
  • Introduction to AXI
  • Interrupts
  • Adding Hardware to an Embedded Design
  • Lab 3: Adding IP to a Hardware Design

Day 2

  • Processor Basics
  • Interfacing to a Processor System
  • Designing Your Own Peripheral Using the IPIC Interface
  • Installing Your Own Peripheral Using the IPIC Interface
  • Lab 4: Building Custom AXI IP for an Embedded System
  • Bus Functional Model Simulation
  • Lab 5: BFM Simulation
  • Adding Your Own IP to the Embedded System
  • Lab 6: Integrating a Custom Peripheral

Lab Descriptions

  • Lab 1: Hardware Construction with the Base System Builder – Create an XPS project by using the Base System Builder to develop a basic hardware system and generate a series of netlists for the embedded design.
  • Lab 2: Adding and Downloading Software – Complete the processes begun in Lab 1 using the SDK tools to create a software BSP and sample application. Configure the FPGA and download the application.
  • Lab 3: Adding IP to a Hardware Design – Learn to add IP from the many choices in the IP library. Use the GUI to add a general-purpose I/O module and access internal block RAM directly from the MHS file.
  • Lab 4: Building Custom AXI IP for an Embedded System – Create and add a custom AXI peripheral (LCD interface) to your design by using the Create or Import Peripheral Wizard.
  • Lab 5: BFM Simulation – Use the ISim simulator to perform Bus Functional Model simulation to verify functionality of the LCD bus peripheral added in the preceding lab.
  • Lab 6: Integrating a Custom Peripheral – Put it all together: add custom IP to the processor system, then integrate the processor sub-system with other logic in an ISE design project.

Schedule

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Embedded Systems course details, dates and locations



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