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Online Training Events

Doulos is delighted to provide the following online training
webinars including live interactive Q&A. Registration and
attendence is FREE!

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Doulos Webinars


May 2018



Webinar: Enabling FPGA Design Reuse with the Vivado IP Integrator »
Date:
Duration:
Presenter:
Summary:
Wednesday May 30, 2018
1 hour session (all time zones covered)
Mike Smith
, Specialist Xilinx Trainer
In this webinar you will learn how to customize IP from the IP Catalog, generate output products and instantiate IP in a design described using Verilog or VHDL.

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Webinars On-Demand




Doulos is pleased to now provide some of the webinars that have been previously broadcast On-Demand.

Verification
Advanced VHDL Verification - OS-VVM and more... »
How to take advantage of UVM-style run-time configuration in VHDL »
Webinars On-Demand

SystemVerilog Out of the Box
Synthesis-Friendly SystemVerilog »

Easier UVM
UVM: Now or Never? »
First Steps with UVM » Recording available in English, French and German
First Steps with UVM: Writing Tests »

Embedded Systems and ARM
ARM V7-M Primer »
Squeezing the most out of battery-life using ARM Cortex-M processors »
CMSIS Turns 3.0 »
ARM Cortex-A9 MPCore »
ARM Cortex-A9 in the Altera SoC FGPA »

View all available Doulos on-demand webinars now »

 


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