Friday 28 July 2017

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Doulos Webinars

Doulos Webinars On-Demand

Doulos is delighted to provide the following FREE online training events on-demand. Check back here regularly for updates.

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: you will need to register some basic details on the website to view the recordings. View privacy policy.

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Advanced VHDL Verification - OS-VVM and more... »
x1 one hour session
Alan Fitch
, Consultant Engineer
Are you using VHDL for verification of complex designs, and wondering if you should move to UVM and SystemVerilog? This webinar will introduce you to Open Source VHDL Verification Methodology (OS-VVM): what it does, how to use it, and how it compares with UVM.

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How to take advantage of UVM-style run-time configuration in VHDL »
x1 one hour session
Alan Fitch
, Consultant Engineer
UVM users are familiar with using the UVM configuration database to control test settings. This allows you to run multiple different tests without having to recompile the testbench. But what if you're currently a VHDL user? Do you have to change to UVM just to get run-time configuration? This webinar will answer these questions and more.

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SV



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Synthesis-Friendly SystemVerilog »
x1 one hour session
John Aynsley
, Doulos CTO
In this webinar we explore the features of SystemVerilog that are useful for RTL synthesis, showing how the RTL SystemVerilog language constructs have been optimized for productivity and reliability.

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Easier UVM



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UVM: Now or Never? »
x1 one hour session
John Aynsley
, Doulos CTO
This webinar highlights the reasons why you should (or in a few cases should not) be adopting UVM right now, and explains how using SystemVerilog with UVM to create your test benches differs from using Verilog or VHDL.

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First Steps with UVM »
x1 one hour session
John Aynsley
, Doulos CTO
In this webinar we go through some very simple examples of working UVM code, explaining what is happening and highlighting both best practice and common pitfalls.

This on-demand webinar is also available in French and German

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First Steps with UVM: Writing Tests »
x1 one hour session
John Aynsley
, Doulos CTO
This webinar shows how to take the first steps in writing tests using UVM, including how to write and start sequences, how to customize the behavior of existing sequences from a test, and how to abstract the test from the details of the design-under-test using the UVM Register Layer.

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ARM


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NEW ARM V7-M Primer »
x1 one hour session
Dr David Cabanis
, Senior Member, Technical Staff
An introduction to the various Cortex-M products (both from the v6-M and v7-M families) as well as details of the ARM microcontrollers' programmer's model, instruction set, exception handling and the pre-defined memory model.

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CMSIS

 



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Squeezing the most out of battery-life using ARM® Cortex®-M processors »
x1 one hour session
Jacob Beningo
,
Consultant from Beningo Engineering
In this webinar, strategies for optimizing microcontroller energy profiles will be examined which will extend battery life while maintaining the integrity of the system. The techniques will be demonstrated on an ARM Cortex-M processor using the Freescale Kinetis®-L board.

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CMSIS

 



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CMSIS Turns 3.0 »
x1 45 minute session
Marcus Harnisch
, Senior Member, Technical Staff
Little over three years ago CMSIS was introduced to the world as a library that provides an abstraction layer between processor core, tool chain and both, device library and user code. What has happened since?

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CMSIS

 



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ARM Cortex-A9 MPCore »
x1 one hour session
Dr David Cabanis
, Senior Member, Technical Staff
This webinar will provide an introduction to the core architecture of the ARM Cortex-A9 processor.

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Advanced VHDL Verification: OSVVM

 



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ARM Cortex-A9 in the Altera® SoC FGPA »
x1 one hour session
Dr David Cabanis
, Senior Member, Technical Staff
Starting with an overview of FPGAs and the increasing inclusion of multicore processors within them, this webinar will go on to explain the features and benefits of the Cortex-A9 and its subsystems, and demonstrate its implementation within the context of Altera SoC FPGAs.

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Advanced VHDL Verification: OSVVM

   

 


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