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F2F TrainingDesigning with the Zynq UltraScale+ RFSoC

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Course Description

This course provides an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family with a special emphasis on the Data Converter and Soft-Decision FEC blocks.

The focus is on:

  • Describing the RFSoC family in general
  • Identifying applications for the Data Converter and SD-FEC blocks
  • Configuring, simulating, and implementing the blocks
  • Reviewing power estimation to help identify the power demands of the RFSoC device in various operating modes
  • Identifying proper layout and PCB considerations since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device

Training Duration

2 day

Who Should Attend?

Hardware designers interested in understanding the architecture and capabilities of the Zynq UltraScale+ RFSoC data converter and SD-FEC hard blocks.

Prerequisites

  • Suggested: Understanding of the Zynq UltraScale+ MPSoC architecture
  • Basic familiarity with data converter terms and principles
  • Basic familiarity with forward error correction terms and principles

Software Tools

  • Vivado® Design Suite 2018.1

Hardware

  • Host computer for running the above software*

* This course focuses on the Zynq UltraScale+ RFSoC architecture. Check with Doulos for the specifics of the in-class lab environment or other customizations.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Describe in general the new Zynq UltraScale+ RFSoC family
  • Identify typical applications for the data converters
  • Describe the architecture and functionality of the ADC
  • Utilize the ADC via configuration, simulation, and implementation
  • Describe the architecture and functionality of the DAC
  • Utilize the DAC via configuration, simulation, and implementation
  • Identify the requirements and options for data converter PCB designs
  • Describe the architecture and functionality of the SD-FEC hard IP
  • Utilize the SD-FEC via configuration, simulation, and implementation

Course Outline

  • Zynq UltraScale+ RFSoC Overview
    Overview of the Zynq UltraScale+ RFSoC architecture, including brief introductions to RF, data converter solutions, SD-FEC solutions, driver support, and tool support.
    {lecture}
  • RFSoC ADC
    Covers the basics of ADCs. Reviews ADC architecture, functionality, interfaces, configuration, and driver support.
    {lecture / demo / lab}
  • RFSoC DAC
    Covers the basics of DACs. Reviews DAC architecture, functionality, interfaces, configuration, and driver support.
    {lecture / demo / lab}
  • RFSoC Data Converter Design
    Describes common features, the design flow, and utilizing the example design by simulation and implementation.
    {lecture / lab}
  • PCB Design for RFSoC Devices
    Describes power requirements, performing power estimation, and utilizingthe power design. Analog signal requirements, PCB materials and layer stackup options, and analog trace design are also covered.
    {lecture}
  • RFSoC Soft-Decision FEC
    Covers the basics of forward error correction. Reviews SD-FEC architecture, functionality, interfaces, configuration, and driver support.
    {lecture / demo / lab}


Course Dates:
November 5th, 2019 San Jose, CA Enquire
indicates CONFIRMED TO RUN courses.

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