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F2F TrainingZynq UltraScale+ MPSoC for the System Architect

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Course Description

This two-day course is structured to provide system architects with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family.

Training Duration

2 days

Who Should Attend?

System architects interested in understanding the capabilities and ecosystem of the Zynq® UltraScale+™ MPSoC device.


  • Suggested: Understanding of the Zynq-7000 architecture
  • Familiarity with embedded operating systems

Software Tools

  • Vivado® Design Suite 2016.3
    • May require special Zynq UltraScale+ MPSoC family license
  • Hardware emulation environment:
    • VirtualBox
    • QEMU
    • Ubuntu desktop
    • PetaLinux


  • Host computer for running the above software*

* This course focuses on the Zynq UltraScale+ MPSoC architecture. Check with Doulos for the specifics of the in-class lab environment or other customizations. The 2015.4 version of this class does not use a physical board, but rather a local emulation environment and the Vivado Design Suite.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
  • Identify mechanisms to secure and safely run the system
  • Outline the high-level architecture of the devices
  • Define the boot sequences appropriate to the needs of the system

Course Outline

Day 1

  • 1.1 Zynq UltraScale+ MPSoC Overview
    Overview of the Zynq UltraScale+ MPSoC device.
  • 1.2 Zynq UltraScale+ MPSoC HW-SW Virtualization
    Covers the hardware and software elements of virtualization. The lab demonstrate how hypervisors can be used.
    {lab / lecture}
  • 1.3 QEMU
    Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available.
    {lab / lecture / demo}
  • 1.4 Zynq UltraScale+ MPSoC Security and Software
    Introduction to the purpose and API of the Software Test Library.

Day 2

  • 2.1 Zynq UltraScale+ MPSoC Power Management
    Overview of the PMU and the power-saving features of the device.
    {lab / lecture / demo}
  • 2.2 Zynq UltraScale+ MPSoC System Coherency
    Learn how information is synchronized within the API and through the ACE/AXI ports.
  • 2.3 Zynq UltraScale+ MPSoC DDR and QoS
    Understand how DDR can be configured to provide the best performance for your system.
    {lab / lecture}
  • 2.4 Zynq UltraScale+ MPSoC
    Booting How to implement the embedded system, including the boot process and boot image creation.
    {lab / lecture}
  • 2.5 Zynq UltraScale+ MPSoC Ecosystem Support
    Overview of supported operating systems, software stacks, hypervisors, etc.

Course Dates:
May 11th, 2020 ONLINE Americas Enquire
July 13th, 2020 Ringwood, UK Enquire
July 30th, 2020 ONLINE Americas Enquire
October 8th, 2020 ONLINE Americas Enquire
October 13th, 2020 Ringwood, UK Enquire
November 24th, 2020 Copenhagen, DK Enquire
November 24th, 2020 Stockholm, SE Enquire
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