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F2F TrainingZynq UltraScale+ MPSoC for the Software Developer

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Course Description

This two-day course is structured to provide software developers with a catalog of OS implementation options, including hypervisors, various Linux implementations, booting and configuring a system, and power management for the Zynq® UltraScale+™ MPSoC family.

Training Duration

2 days

Who Should Attend?

Software developers interested in understanding the OS and other capabilities of the Zynq UltraScale+ MPSoC device.


  • General understanding of embedded and real-time operating systems
  • Familiarity with issues related to implementing a complex embedded system

Software Tools

  • Vivado® Design Suite 2016.3
    • May require special Zynq UltraScale+ MPSoC family license
  • Hardware emulation environment:
    • VirtualBox
    • QEMU
    • Ubuntu desktop
    • PetaLinux


  • Host computer for running the above software*

* This course focuses on the Zynq UltraScale+ MPSoC architecture. Check with Doulos for the specifics of the in-class lab environment or other customizations. The 2015.4 version of this class does not use a physical board, but rather a local emulation environment and the Vivado Design Suite.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Enumerate the key elements of the application processing unit (APU) and real-time processing unit (RPU)
  • List the various power domains and how they are controlled
  • Describe the connectivity between the processing system (PS) and programmable logic (PL)
  • Utilize QEMU to emulate hardware behavior

Course Outline

Day 1

  • 1.1 Zynq UltraScale+ MPSoC Application Processing Unit
    Introduction to the members of the APU, specifically the Cortex®-A53 processor and how the cluster is configured and managed.
    {lecture / demo}
  • 1.2 Zynq UltraScale+ MPSoC Real-Time Processing Unit
    Introduction to the various elements within the RPU and different modes of configuration.
    {lab / lecture / demo}
  • 1.3 Arm TrustZone Technology
    Illustrates the use of the Arm® TrustZone technology.
  • 1.4 QEMU
    Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available.
    {lab / lecture / demo}
  • 1.5 Zynq UltraScale+ MPSoC HW-SW Virtualization
    Covers the hardware and software elements of virtualization. The lab demonstrates how hypervisors can be used.
    {lab / lecture}
  • 1.6 Multiprocessor Software Architecture
    Introduces several potential architectures and illustrate the strengths of each.
  • 1.7 Xen Hypervisor (pairs with OpenAMP, but not SMP)
    Description of generic hypervisors and discussion of some of the details of implementing a hypervisor using Xen.
    {lab / lecture}
  • 1.8 OpenAMP (pairs with the Xen Hypervisor, but not SMP)
    Introduction to the concept of OpenAMP.
    {lab / lecture}
  • 1.9 Linux
    Discussion and examples showing how to configure Linux to manage multiple processors.
    {lecture / demo}

Day 2

  • 2.1 Yocto
    Compares and contrasts the kernel building methods between a "pure" Yocto build and the PetaLinux build (which uses Yocto "under-the-hood")
    {lab / lecture / demo}
  • 2.2 Open Source Library
    Introduction to open-source Linux and the effort and risk-reducing PetaLinux tools.
    {lab / lecture / demo}
  • 2.3 FreeRTOS
    Overview of FreeRTOS with examples of how it can be used.
    {lab / lecture / demo}
  • 2.4 Zynq UltraScale+ MPSoC Software Stack
    Introduction to what a software stack is and a number of stacks used with the Zynq UltraScale+ MPSoC.
  • 2.5 Zynq UltraScale+ MPSoC PMU
    Investigation into the the tools and techniques for debugging a Zynq UltraScale+ MPSoC device.
    {lab / lecture}
  • 2.6 Zynq UltraScale+ MPSoC Power Management
    Overview of the PMU and the power-saving features of the device.
  • 2.7 Zynq UltraScale+ MPSoC Booting
    How to implement the embedded system, including the boot process and boot image creation.
    {lab / lecture}

Course Dates:
November 30th, 2020 Ringwood, UK Enquire
indicates CONFIRMED TO RUN courses.

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