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Xilinx - Advanced Embedded Systems Hardware and Software Design

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This course provides embedded systems developers the necessary skills to develop complex embedded systems and enables them to improve their designs by using the tools available in the Embedded Development Kit (EDK). This course also helps developers understand and utilize advanced components of embedded systems design for architecting a complex system using the Zynq™ All Programmable SoC. (Looking for Microblaze? Click here »).

The course builds on the skills gained in Embedded Systems Design, using materials developed by Xilinx, and conveniently combines:

Who should attend?

FPGA design engineers, system architects, and system engineers who are interested in advanced Xilinx embedded systems development flow.

Pre-requisites

  • Embedded Systems Design course or experience with embedded systems design and Xilinx EDK toolse
  • Completion of Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
  • C or C++ programming experience (including general debugging techniques)
  • Some HDL modelling experience
  • Conceptual understanding of embedded processing systems including device drivers, interrupt routines writing / modifying scripts, user applications and boot loader operation
  • Experience developing software for embedded processor applications

Developing for 6 Series FPGAs?

The content of this course can also be accessed by FPGA designers looking to develop embedded systems using the Xilinx MicroBlaze soft processor in a 6 Series FPGAs (such as Spartan-6 or Virtex-6). Please contact Doulos for the specifics of your requirements before booking.

Software Tools

  • Vivado Design or System Edition 2014.1

Hardware

  • Architecture: Zynq® All Programmable SoC
  • Demo board: Zynq® All Programmable SoC ZC702
* This course focuses on the Zynq All Programmable SoC architecture. Please contact Doulos for the specifics of the in-class lab board or other customizations.

Skills gained

After completing this training, you will be able to:
  • Assemble an advanced embedded system
  • Take advantage of the various features of the Zynq All Programmable SoC, including the AXI interconnect and various memory controllers
  • Apply advanced debugging techniques, including the use of the ChipScope™ tool for debugging an embedded processor-based system design
  • Discuss the features and components of the Zynq processing system (PS)
  • Utilize programmable logic (PL) block RAM to extend the memory resources available to the PL for the Cortex®-A9 processor
  • Integrate an interrupt controller and interrupt handler into your embedded design
  • Describe the make up of a multi-processor system and the various scenarios available using the ARM Cortex-A9 processor
  • Design a flash memory-based system and boot load from off-chip flash memory
  • Perform HDL-based system simulation with an embedded processor
  • Implement an effective Zynq All Programmable SoC boot design methodology
  • Create an appropriate FSBL image for flash
  • Identify advanced Cortex®-A9 processor services for fully utilizing the capabilities of the Zynq All Programmable SoC
  • Analyze the operation and capabilities of the DMA controller in the Zynq All Programmable SoC
  • Examine the various Standalone library services and performance capabilities of the Ethernet and USB controllers in the Zynq All Programmable SoC
  • Describe the Standalone library services available for low-speed peripherals that are contained in the Zynq PS.

Associated Courses

Course Outline

Day 1

  • Embedded Systems Development Review
  • Lab 1: Building a Complete Embedded System
  • Zynq All Programmable SoC Processing System Overview
  • Debugging Using the ChipScope Pro Analyzer
  • Lab 2: Debugging Using the ChipScope Pro Analyzer
  • Block RAM and Memory Controllers
  • External Memory Controllers for Static Memory
  • Memory Controllers for Dynamic RAM
  • Lab 3: Extending Memory Resources

Day 2

  • Interrupts
  • AXI Streaming Interface
  • System Data Movement: Low Latency and High Bandwidth
  • Advanced Processor and Peripheral Interface Options
  • Lab 4: High-Performance DMA
  • Advanced Processor Configurations
  • Software Boot and PL Configuration
  • Lab 5: Boot Loading from Flash Memory
  • HDL System Simulation with an Embedded Processor
  • Lab 6: Simulating an Embedded Processing System

Day 3

  • Advanced Boot Methodology on the Zynq All Programmable SoC
  • Zynq All Programmable SoC Boot Details
  • Lab 7: Zynq All Programmable SoC Boot Memory
  • Advanced Cortex-A9 Processor Services
  • Advanced DMA Controller Configuration on the Zynq All Programmable SoC
  • Lab 8: Configuring DMA on the Zynq All Programmable SoC
  • High-Speed Peripheral Configuration on the Zynq All Programmable SoC
  • Low-Speed Peripherals on the Zynq All Programmable SoC
  • Lab 9: Peripheral Programming on the Zynq All Programmable SoC

Lab Descriptions

  • Lab 1: Building a Complete Embedded System – Develop hardware that incorporates IP cores to interface to push buttons, a rotary switch, LEDs, an LCD display, and serial communication. Use the SDK development tools to create an embedded software application project for the hardware built.
  • Lab 2: Debugging Using the ChipScope Pro Analyzer – Perform simultaneous hardware and software debugging with the ChipScope™ Pro Analyzer, SDK Debug perspective (GDB), and XMD.
  • Lab 3: Extending Memory Resources – Use XPS to extend the memory resources for the Cortex-A9 processor.
  • Lab 4: High-Performance DMA – Apply advanced PL design techniques for adding and connecting custom peripherals that access DDRx memory.
  • Lab 5: Boot Loading from Flash Memory – Develop an application that is stored in flash memory, load it through a boot loader program, and execute a software application from external memory.
  • Lab 6: Simulating an Embedded Processing System – Set up and perform HDL-based simulation on a design that contains an embedded processor system. Explore the tool flow for performing embedded processing simulation, including hardware co-simulation.
  • Lab 7: Zynq Boot Memory Lab – Explore the principles of creating a bootable flash image based on a First Stage Bootloader (FSBL) project.
  • Lab 8: Configuring DMA on the Zynq All Programmable SoC – Program the DMA controller on the Zynq PS and explore the various Standalone library services that support the Zynq PS DMA controller.
  • Lab 9: Peripheral Programming on the Zynq All Programmable SoC – Program the Gigabit Ethernet controller on the Zynq All Programmable SoC and verify in hardware. Explore the various lwip Standalone library services that support the Zynq Gigabit Ethernet controller.

Course Dates:
November 14th, 2017 Ringwood, UK Enquire
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