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Doulos Live Online trainingXilinx - Embedded Systems Hardware and Software Design ONLINE

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PLEASE NOTE: This is a LIVE INSTRUCTOR-LED training event delivered ONLINE.

It covers the same scope and content as a scheduled face-to face class and delivers comparable learning outcomes. Daily sessions comprise 4-6 hours of class contact time.

This course brings experienced FPGA designers up to speed on developing embedded systems for the Zynq® System on Chip (SoC), or Zynq Ultrascale+™ MPSoC and adding and simulating AXI-based peripherals using bus functional model (BFM) simulation. In addition, this course introduces the concepts, tools, and techniques required for software design and development for the Zynq System on a Chip (SoC) using the Xilinx® Software Development Kit (SDK).

This course uses materials developed by Xilinx and conveniently combines the courses:

Training Duration

5 sessions (Details » )

Who should attend?

Software and hardware design engineers who are interested in developing embedded systems with the Xilinx Zynq System on Chip (SoC), or Zynq Ultrascale+ MPSoC and debugging using the Xilinx Standalone library.

Pre-requisites

  • FPGA design experience
  • Completion of FPGA Essentials training or equivalent knowledge of Xilinx Vivado® software tools
  • Basic understanding of C or C++ programming (including general debugging techniques)
  • Some HDL modelling experience
  • Conceptual understanding of embedded processing systems including device drivers, interrupt routines writing / modifying scripts, user applications and boot loader operation

Software Tools

  • Vivado® Design or System Edition (latest version). Please contact Doulos about your specific requirements.

Hardware

  • Architecture: Zynq-7000 SoC (Arm® Cortex®-A9), Zynq Ultrascale+ MPSoC (Cortex-A53 and Cortex-R5 processors)

* This course focuses on the Zynq SoC and 7 Series FPGA architectures. Please contact Doulos for the specifics of the in-class lab board, other customizations or architecture.

Skills gained

After completing this training, you will be able to:
  • Describe the various tools that encompass a Xilinx embedded design
  • Rapidly architect an embedded system containing an Arm Cortex-A9/A53/R5 processor by using the Vivado IP Integrator and Configuration Wizard
  • Develop software applications using the Eclipse-based  Software Development Kit (SDK)
  • Create and integrate an IP-based processing system component in the Vivado Design Suite
  • Design and add a custom AXI interface-based peripheral to the embedded processing system
  • Simulate a custom AXI interface-based peripheral using verification IP (VIP)
  • Implement an effective software design environment for a Xilinx embedded system using the Xilinx SDK tools
  • Write a basic user application (under Standalone or Linux) using the Xilinx Software Development Kit (SDK)
  • Use Xilinx debugger tools to troubleshoot user applications
  • Apply software techniques to improve operability
  • Maintain and update software projects with changing hardware

Associated Courses

Course Outline

Session 1

  • Embedded UltraFast Design Methodology {Lecture, Demo} Outlines the different elements that comprise the Embedded Design Methodology
  • Overview of Embedded Hardware Development {Lecture, Demo} Overview of the embedded hardware development flow
  • Driving the IP Integrator Tool {Lecture, HW Lab 1} Describes how to access and effectively use the IPI tool
  • AXI: Introduction {Lecture} Introduces the AXI protocol
  • AXI: Variations {Lecture} Describes the differences and similarities among the three primary AXI variations.
  • AXI: Transactions {Lecture, Demo} Describes different types of AXI transactions
  • Introduction to Interrupts {Lecture} Introduces the concept of interrupts, basic terminology, and generic implementation
  • Interrupts: Hardware Architecture and Support {Lecture} Reviews the hardware that is typically available to help implement and manage interrupts
  • AXI: Connecting AXI IP {Lecture, Demo} Describes the relationships between different types of AXI interfaces and how they can be connected to form hierarchies
  • Creating a New AXI IP with the Wizard {Lecture, HW Lab 4} Explains how to use the Create and Import Wizard to create and package an AXI IP

Session 2

  • AXI: BFM Simulation Using Verification IP (Lecture, HW Lab 5} Describes how to perform BFM simulation using the Verification IP
  • Zynq-7000 SoC Architecture Overview {Lecture, HW Lab 7, Demo} Overview of the Zynq-7000 SoC architecture
  • Zynq UltraScale+ MPSoC Architecture Overview {Lecture, Lab, Demo} Overview of the Zynq UltraScale+ MPSoC architecture
  • Overview of Embedded Software Development {Lecture} Overview of the process for building a user application
  • Embedded UltraFast Design Methodology {Lecture, Demo} Outlines the different elements that comprise the Embedded Design Methodology
  • Zynq-7000 SoC Architecture Overview {Lecture, Lab, Demo} Overview of the Zynq-7000 SoC architecture.

Session 3

  • Zynq UltraScale+ MPSoC Architecture Overview {Lecture, Demo} Overview of the Zynq UltraScale+™ MPSoC architecture
  • Driving the SDK Tool {Lecture, SW Lab4} Introduces the basic behaviors required to drive the SDK tool to generate a C/C++ application that can be debugged
  • System Debugger {Lecture, Demo} Describes the basics of running a debugger and illustrates the most commonly used debugging commands.
  • Standalone Software Platform Development {Lecture, Lab 6} Covers the various software components, or layers, supplied by Xilinx that aid in the creation of low-level software
  • C Coding Support for Standalone {Lecture} Reviews the basic services (libraries) available when coding in the Standalone environment
  • Memory File System (Standalone) {Lecture, Lab 7} Introduces the memory file system (MFS) from the Standalone library, which provides drivers and utilities for effectively converting a region of memory into a file system

Session 4

  • Zynq UltraScale+ MPSoC Architecture Overview {Lecture, Demo} Overview of the Zynq UltraScale+™ MPSoC architecture
  • Driving the SDK Tool {Lecture, SW Lab4} Introduces the basic behaviors required to drive the SDK tool to generate a C/C++ application that can be debugged
  • System Debugger {Lecture, Demo} Describes the basics of running a debugger and illustrates the most commonly used debugging commands.
  • Standalone Software Platform Development {Lecture, Lab 6} Covers the various software components, or layers, supplied by Xilinx that aid in the creation of low-level software
  • C Coding Support for Standalone {Lecture} Reviews the basic services (libraries) available when coding in the Standalone environment
  • Memory File System (Standalone) {Lecture, Lab 7} Introduces the memory file system (MFS) from the Standalone library, which provides drivers and utilities for effectively converting a region of memory into a file system

Session 5

  • Writing Code in the Xilinx Linux Environment {Lecture, Demo} Reviews the use of the Xilinx SDK tool for Linux software development
  • Booting Overview {Lecture, SW Lab 11} Describes the main points to how booting a processor is handled for Zynq SoC devices
  • Profiling Overview {Lecture, Demo} – Introduces the purpose and techniques for profiling a user application
  • Understanding Device Drivers {Lecture, Demo} Explains the concept of a device driver and how it is used by embedded systems
  • Custom Device Drivers {Lecture, SW Lab 13} Describes how to successfully write a custom device driver

Course Dates:
August 31st, 2020 ONLINE Americas Enquire
September 7th, 2020 ONLINE EurAsia Enquire
November 2nd, 2020 ONLINE Americas Enquire
November 2nd, 2020 ONLINE EurAsia Enquire
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