Tuesday 7 July 2020

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Home > Knowhow > Sysverilog > Doulos at SNUG Europe 04

A User's Experience with SystemVerilog

Doulos presented a paper at the SNUG Europe '04 conference. In this paper we reported our experience in using SystemVerilog to design and verify a CORDIC processor module.

Right-click on these links to download the paper and presentation in PDF format, and the source code and scripts as a tar-file.

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