In parallel with the public release of the OVM methodology Doulos is announcing the release of a 3 day OVM Adopter Class
. Since the announcement of OVM in September 2007 Doulos verification specialists have been working closely with the OVM teams within Mentor Graphics and Cadence to ensure that the availability of independent training coincides with the release of OVM itself.
The new class is an integral part of the Doulos SystemVerilog out of the Box™ program joining the Doulos range of SystemVerilog training and support components.
Doulos delivered its first SystemVerilog training in 2004, and has supported the evaluation and adoption of SystemVerilog in both design and verification groups, across all industry segments and tool contexts, since that time. Working closely with the methodology groups in all the leading EDA vendors, this has given Doulos a unique view of the evolution of SystemVerilog, both in terms of its capability and the support needed for successful adoption.
Rob Hurley, Doulos CEO comments, "The news that Cadence and Mentor Graphics are to co-operate in the area of verification methodology is very good news for the industry. Standardisation has always been a key driver in ensuring design methods keep pace with the Time to Market and Productivity challenges facing the electronics industry. OVM will be a significant step in standardisation in the complex verification domain where many of the greatest challenges lie."
"This announcement from Doulos is great news for teams who now plan to adopt OVM," said Dennis Brophy, Director of Strategic Business Development, Mentor Graphics Design Verification and Test Division. "Over the 15 years Mentor Graphics has worked with Doulos they have consistently innovated to match industry developments with the delivery of timely, high quality training solutions for our customers."
"The new Doulos class is a welcome addition to the rapidly growing community of companies and products lining up behind the Open Verification Methodology," said Steve Glaser, Corporate Vice President, Marketing, Cadence Verification Division. "Their training expertise will be beneficial for users eager to adopt the OVM, the single open, robust and interoperable SystemVerilog verification methodology."
In addition to the OVM Adopter Class
, delegates attending other classes in the Doulos SystemVerilog portfolio can opt to benefit from methodology briefings, which will give an overview of the different approaches.
Doulos develops and delivers global training solutions for SoC, FPGA and ASIC design and verification. Established in 1990 and fully independent their unparalleled in-house expertise supports methodology training for SystemVerilog, SystemC, e, PSL, Verilog, and VHDL. Doulos know-how has contributed to the success of more than 600 companies across 30 countries through in-house training, and a regular schedule of classes in the US and Europe.