Summit Design, Inc., a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, announced today that it welcomes Doulos, the global leader in the development and delivery of world class, market-leading SystemC methodology training, into its rapidly growing ESL & Embedded Systems Training Program.
The Training Program
Summit's program, first launched in December of 2005, was developed to simplify and accelerate SystemC adoption. With the addition of Doulos, its 5th program partner and first global training provider, novice and advanced users of SystemC can exploit the special features of Summit's Vista™ across the full range of Doulos's SystemC training courses.
Doulos is a worldwide provider of industry-leading SystemC training. Selected by the Open SystemC Initiative (OSCI) to author the SystemC LRM and IEEE standard, the company has been actively involved in the development of SystemC methodology training since 2000. More than 100 established and emerging companies across the USA, Asia and Europe have benefited from Doulos' in-house SystemC expertise.
"Doulos offers regularly scheduled, as well as customized, SystemC training courses in various locations all around the globe making it possible for engineers following our Transaction-Level Modeling Track to employ Vista to significant advantage," stated Rob Hurley, CEO of Doulos. "Vista's Transaction-Sequence Viewer™ supports constructs critical to the hardware portion of system-level design and provides advanced analysis of complex SystemC transaction-level models."
"Partnering with Doulos - a worldwide training provider with highly impressive SystemC credentials - provides excellent value to our customers," said Azeddine Bouchiha, director of SystemC design technologies at Summit Design. "Their impressive curriculum and comprehensive understanding of SystemC, in combination with Vista's robust debug and analysis capabilities, will help to ensure more rapid SystemC adoption and advanced user success."
Doulos is the global leader for the development and delivery of world class, market-leading training solutions for SoC, FPGA and ASIC design and verification. An independent company established in 1991, Doulos sets the industry standard for high quality technical training in SystemC™, SystemVerilog, e, PSL, VHDL, Verilog®, Perl & Tcl/Tk. Doulos in-house expertise and world leading know-how in key technology areas has contributed to the success of more than 600 companies across 30 countries. Regular public courses are scheduled in Europe and the USA while in-house and customised training is delivered world-wide.
About Summit's Vista IDE
Vista™ is an integrated development environment (IDE) for SystemC that combines both hardware and software concepts to speed design and debug of SystemC applications. It is easy to adopt, since it builds upon the industry standard gnu tools. It's unique Data Introspection, design exploration and debugging features make for more rapid understanding of designs and the verification process. Vista also offers advanced coding facilities, browsers, and a verification toolset targeted for high-level SystemC transaction-level modeling (TLM). Vista's SystemC Transaction Sequence Viewer™ (TSV) supports effective debug of designs written at the transaction-level, with no set-up. With the TSV, designers can automatically view and debug complex communication protocols and system-level interfaces between blocks. While other SystemC design environments require time-consuming manual code instrumentation, Vista's TSV automatically captures the interface method calling sequence and presents the communication protocol transactions in an intuitive tabular format. The unique debugging capabilities in Vista are possible because of its built-in SystemC awareness and its in-depth understanding of SystemC designs.
Summit Design's industry-leading ESL and HDL solutions enable SOC companies to deliver products that meet system-level performance and power targets with dramatically reduced schedule risk. Summit's products address engineering challenges met during the specification and implementation design phases of complex hardware/software systems. System Architect™ enables massive increases in design complexity and performance by analyzing architectural tradeoffs to arrive at optimized system specifications. Vista™ and Visual Elite™ ensure swift, successful design modeling and implementation in SystemC, Verilog, and VHDL. Top electronics companies worldwide, including leaders in the wireless, automotive, and consumer electronics space, have achieved dramatic reductions in design cycle time through their use of Summit's products. Summit Design is headquartered in Burlington, Mass. with offices throughout the US, Europe, Japan, Israel, and ROA. To learn more, please visit http://www.sd.com.