Global training solutions for engineers creating the world's electronics products

ARM Cortex-A5 MPCore SoC Design

Standard Level - 4 days

This course is designed for those who are designing hardware based around the Arm® Cortex®-A5 processor.

Who should attend?

Hardware design engineers who need to understand the issues involved when designing SoCs around the ARM Cortex-A5.

Pre-requisites
  • Some knowledge of embedded systems
  • Familiarity with digital logic and hardware/ASIC design issues
  • A basic awareness of ARM is useful but not essential
Training materials

This class uses training materials developed by Arm.

Content
  • Cortex-A5 Overview
  • ARM v7-A Instruction Sets
  • Introduction to TrustZone
  • AXI Protocol
  • AXI Interconnection Architectures
  • PL301/NIC301
  • Cortex-A5 Processor Core
  • Cortex-A5 L1 Sub-Systems
  • Cortex-A5 L2 Interfaces
  • Cortex-A5 Configuration & Deployment
  • Cortex-A5 Reference Methodology Overview
  • Cortex-A5 Clocks, Resets & Power Management
  • Cortex-A5 Memory Management
  • L2C-310 Level 2 Cache Controller
  • Introduction to CoreSight
  • Cortex-A5 Invasive Debug
  • Cortex-A5 Non-Invasive Debug
  • Cortex-A5 Integration

Looking for team-based training, or other locations?

Complete an enquiry form and a Doulos representative will get back to you.

Enquiry FormPrice on request