This course brings experienced FPGA designers up to speed on developing embedded systems using the Embedded Development Kit (EDK) for 6 Series FPGAs. The basic features and capabilities of the Xilinx MicroBlaze soft processor are also included in the lectures and labs. These hands-on labs are plentiful and provide personal experience with the development, debugging and simulation of an embedded system.
This course uses materials developed by Xilinx. Within a cost-effective three days, it combines the key features of the Xilinx courses:
This course is also available for in-house delivery. Please contact Doulos to discuss your requirements or if you have any queries regarding the course specifications.
Software and hardware design engineers who are interested in developing embedded systems with the Xilinx MicroBlaze soft processor using the Embedded Development Kit and a Xilinx FPGA.
- FPGA design experience
- Completion of Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
- Basic understanding of C or C++ programming (including general debugging techniques)
- Some HDL modelling experience
- Conceptual understanding of embedded processing systems including device drivers, interrupt routines writing / modifying scripts, user applications and boot loader operation
- Xilinx ISE® Design Suite: System Edition 13.1
- Architecture: Spartan®-6 and Virtex®-6 FPGAs*
- Demo board: Spartan®-6 FPGA SP605 or Virtex®-6 FPGA ML605 board**
* This course focuses on the Spartan-6 and Virtex-6 architectures. Please contact Doulos for the specifics of the in-class lab board or other customizations.
After completing this training, you will be able to:
- Describe the various tools that encompass the Xilinx Embedded Development Kit (EDK)
- Rapidly architect an embedded system containing a MicroBlaze processor and Xilinx-supplied AXI architecture IP by using the Base System Builder (BSB)
- Utilize the Eclipse-based Software Development Kit (SDK) to develop software applications and debug software
- Create and integrate your own IP into the Project Navigator environment
- Simulate your own custom peripherals with Bus Functional Models (BFMs)
- Implement an effective software design environment for a Xilinx embedded system using the Xilinx SDK tools
- Write a basic user application using the Xilinx Software Development Kit (SDK) and run it on the embedded system
- Use Xilinx debugger tools to troubleshoot user applications
- Apply software techniques to improve operability
- Reduce embedded software development time
- EDK Overview
- Base System Builder
- Lab 1: Hardware Construction with the Base System Builder
- Software Development Using SDK
- Lab 2: Adding and Downloading Software
- Missing the Bus – Making Connections
- Introduction to AXI
- Adding Hardware to an Embedded Design
- Lab 3: Adding IP to a Hardware Design
- Processor Basics
- Interfacing to a Processor System
- Designing Your Own Peripheral Using the IPIC Interface
- Installing Your Own Peripheral Using the IPIC Interface
- Lab 4: Building Custom AXI IP for an Embedded System
- Bus Functional Model Simulation
- Lab 5: BFM Simulation
- Adding Your Own IP to the Embedded System
- Lab 6: Integrating a Custom Peripheral
- Processors, Peripherals and Tools
- Software Platform Development
- Writing Code in the Xilinx Environment
- Lab 7: Application Development
- Address Management
- Lab 8: Software Interrupts
- Application Debugging
- Lab 9: Debugging
- Writing a Custom Device Driver
- Lab 10: Writing a Device Driver (time permitting)
- Lab 1: Hardware Construction with the Base System Builder – Create an XPS project by using the Base System Builder to develop a basic hardware system and generate a series of netlists for the embedded design.
- Lab 2: Adding and Downloading Software – Complete the processes begun in Lab 1 using the SDK tools to create a software BSP and sample application. Configure the FPGA and download the application.
- Lab 3: Adding IP to a Hardware Design – Learn to add IP from the many choices in the IP library. Use the GUI to add a general-purpose I/O module and access internal block RAM directly from the MHS file.
- Lab 4: Building Custom AXI IP for an Embedded System – Create and add a custom AXI peripheral (LCD interface) to your design by using the Create or Import Peripheral Wizard.
- Lab 5: BFM Simulation – Use the ISim simulator to perform Bus Functional Model simulation to verify functionality of the LCD bus peripheral added in the preceding lab.
- Lab 6: Integrating a Custom Peripheral – Put it all together: add custom IP to the processor system, then integrate the processor sub-system with other logic in an ISE design project.
- Lab 7: Application Development – Create a simple software application project from provided source files for a software loop-based stopwatch. Research hardware and software documentation to complete the application; then download it to hardware.
- Lab 8: Software Interrupts – Replace a software timing loop with an interrupt-driven timer. Add the timer software and write an interrupt handler for the timer. Configure the FPGA, download, and test the application.
- Lab 9: Debugging – Set up the SDK debug perspective and the previous lab’s stopwatch application for debugging, setting breakpoints, calculating interrupt latency, and stepping through the program’s operation.
- Lab 10: Writing a Device Driver – Create the skeleton driver framework, add an LCD device driver, create the BSP, and verify proper device driver operation via a download to hardware test.