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Arm Cortex-M23 Software Design ONLINE

Standard Level: 5 sessions (7 hours per session)


PLEASE NOTE: This is a LIVE INSTRUCTOR-LED training event delivered ONLINE. Please note for this course, daily sessions are up to 7 hours including breaks.


This course is designed for engineers developing software for platforms based around the Arm® Cortex®-M23 processor. The course includes an introduction to the Arm product range and supporting IP, the Cortex-M23 core, programmers' model, TrustZone-M security features, instruction set and debug architecture, compilers/linker tools. The course includes a number of hands-on practical exercises covering both assembly and C programming to reinforce the lecture material.

This course is designed for software engineers writing application and system software for platforms using the Cortex-M23 processor.

  • How to program Arm Cortex-M23 microcontrollers
  • How to deal with interrupts and aborts
  • Cortex-M23 initialization procedure
  • How the SAU and IDAU interact
  • How to get into and out of TrustZone security states
  • Understanding how registers are affected and where programmers need to take care
  • Reducing overhead with CSME compliant compilers
  • Reducing security impacts to non-secure software
  • How to build non-secure software
  • Impacts to latency caused by transitions
  • Configure the Security Attribution Unit
  • How violations are caught
  • How to debug secure code
  • Prevent non-secure access to debug resources
  • Some basic C programming knowledge
  • Experience of assembler programming is not required but would be beneficial
  • Some knowledge of embedded systems
  • A basic awareness of Arm is useful but not essential

This class is based on source training material developed by Arm themselves, augmented with supplemental content and labs developed by Doulos. Doulos is a global Arm Approved Training Center.

Introduction to Arm

  • History
  • Ecosystem
  • Processor's History
  • Arm Based SoC

 

Cortex-M23 Overview

  • Processor's Features
  • Register Set
  • Modes of Operation
  • Memory Map
  • System Interfaces
  • Exceptions
  • Memory Protection
  • Security Attribution
  • Power Management
  • Timer
  • Debug Features

 

Cortex-M23 Processor Core

  • Datapath
  • Integer Pipeline
  • IO Port
  • Execution Determinism
  • Instruction Cycle Timing
  • System Timer

 

Armv8-M Baseline Programmers' Model

  • Introduction
  • Data Types
  • Core Registers
  • Modes, privilege and stacks
  • Exceptions
  • Instruction Set Overview

 

Armv8-M Memory Protection

  • Memory Map
  • Memory Regions
  • Memory Attributes
  • MPU Programmer's model
  • Configuring the MPU
  • Memory Management Faults

 

Armv8-M Baseline Assembly Programming

  • Introduction
  • Data Processing Instructions
  • Load/Store Instructions
  • Flow Control
  • Miscellaneous

 

Armv8-M Synchronization

  • Introduction to synchronization and semaphores
  • Exclusive accesses
  • Memory ordering

 

Armv8-M Baseline Memory Model

  • Introduction
  • Memory Address Space
  • Memory Types and Attributes
  • Endianness
  • Barriers

 

Embedded Software Development

  • Semihosting / retargeting
  • Mixing C/C++ and assembly
  • Application Startup
  • Tailoring image memory map to your target
  • Accessing memory mapped peripherals
  • Additional considerations

 

GNU Compiler Hints and Tips

  • Basic Compilation
  • Compiler Optimizations
  • Coding Considerations
  • Local and Global Data Issues

 

GNU Linker Hints and Tips

  • Linking Basics
  • System and User Libraries
  • Linker Script
  • Veneer and Interworking
  • Linker Optimizations and Diagnostics
  • GNU Embedded Development Libraries

 

Armv8-M Baseline Exception Handling

  • Introduction
  • Exception Model
  • Exception Entry and Exit Behavior
  • Prioritization and Control
  • Interrupt Sensitivity
  • Writing the Vector Table and Interrupt Handlers
  • Internal Interrupts and RTOS Support
  • Fault Exceptions

 

Armv8-M Baseline Security Extension

  • Overview
  • Memory Configuration
  • Function Calls
  • Exceptions
  • Toolchain Support

 

Armv8-M Baseline Debug & Trace

  • Introduction to Debug
  • Debug Modes and Security
  • Debug Events and Reset
  • Flash Patch and Breakpoint Unit - FPB
  • Data Watchpoint and Trace Unit - DWT
  • Micro Trace Buffer - MTB
  • Embedded Trace Macrocell - ETM
  • Trace Port Interface Unit - TPIU (if ETM is implemented)

 

Appendix (covered based on the available time)

 

Tools Overview for Arm Microcontrollers

  • Arm Compilation Tools
  • Keil MDK
  • DS-5
  • Arm Fast Models

 

Cortex Microcontroller Software Interface Standard

  • Introduction
  • CMSIS-Core
  • CMSIS-DSP
  • CMSIS-Driver
  • CMSIS-RTOS
  • CMSIS-SVD
  • CMSIS-Pack
  • CMSIS-DAP

The tool-chain required for the exercises are provided within a self-contained virtual machine. The student is only required to install the VirtualBox software on her/his Windows/Linux/Mac host machine. The remaining tools and exercises files are pre-configured and located inside the Virtual Machine to be run locally. The VM can be used for day do day embedded software development and allows the student to continue or redo his exercises even after the course has ended.

The exercises are designed to run on the provided NUCLEO STM32L552 board. This board is kept by the student at the end of the class.

The exercises cover a large spectrum of topics amongst those:

  • Assembly programming
  • Exception handling with the implementation priority schemes and pre-emption
  • Mixing C and assembly to provide a semi-hosted solution
  • Creating linker scripts

 

The security related hands-on exercises are:

Part 1: Tool Flow

Part 2: Security Attribution Unit Configuration

Part 3: Configuring the non-secure world

Part 4: Transition to the non-secure world

Part 5: Using Arm cmse attributes for non-secure calls

Part 6: Using Arm cmse attributes for secure calls

Part 7: Identifying the source of a function call

Part 8: Checking a data array address range

Part 9: Accessing secure data from a non-secure application

Part 10: Illegal access to a secure function from the non secure word

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