ARM processors are the de facto standard for 32 bit microcontroller applications. ARM provides a wide range of cores, from the very low cost ARM7TDMI processor to the high performance and feature-rich ARM1176TZ-S processor.
Doulos has been an ARM Approved Training Partner for many years, and in addition to standard ARM training offers a wide range of ARM based training modules for team-based training.
ARM1176 SoC Design is a single program to fulfil team-based training requirements. It introduces the ARM architecture and instruction sets for ARM7 to ARM11 processor families, including the handling of exceptions, before providing indepth tuition on ARM11 based system-on-chip (SoC) design. It covers the AMBA3.0 (AXI) interface and the connection of new IP blocks into an existing ARM system and includes an introduction to the ARM RealView software tools.
As a vendor-independent training company, Doulos can provide workshops in the context of your own choice of synthesis and simulation tools. Please contact Doulos to discuss your specific tool requirements.
System design engineers, software design engineers and hardware design engineers who wish to develop systems and applications based on ARM processors.
All participants must be computer literate and have a basic understanding of the C programming language and a hardware description language such as VHDL or Verilog. An in-depth knowledge of microprocessors is not essential, but would be advantageous.
This class uses training materials developed by ARM®. In addition, Doulos has developed dedicated workbooks for delegates who wish to use MDK, rather than RVDS, in the workshops.
ARM architecture • Overview of ARM • ARM based applications • ARM instruction set overview • ARM programmer's model • supporting technologies
ARM7TDMI and ARM9TDMI processor pipelines • ARM7 processor family • ARM9 processor family • ARM10E processor family • ARM11 processor family • StrongARM and XScale • Datapaths and instruction decoding
Compilers • Assembler • Linker • Codewarrior • Debuggers
Practical work using RVDS
Overview of how to handle the different exceptions of an ARM core. Includes detailed examples.
ARM7TDMI and ARM9TDMI processor pipelines • ARM7 processor family • ARM9 processor family • ARM10E processor family • ARM11 processor family • StrongARM and XScale • Datapaths and instruction decoding
Detailed description of the new AMBA 3 interconnect methodology • AXI, AHB and APB interconnect standards • PL300 bus matrix IP
Introduction to the Level1 Sub-System • System Control Coprocessor (CP15) features • Cache organisation • Tightly Coupled Memory (TCM) • DMA Interface • Cache timing • Write buffer
Introduction to the Level2 interface and memory system • Clock domains • L2 interface clocking, cache line fills • Non-cacheable fetches • Data interface • Peripheral interface • DMA interface
Inner and outer caches • Caching policies • TEX Remap • Communicating cache policy • Example system with L2 cache
The different ARM models and their use in the SoC design process • The new ARM RealView SoC Designer (SystemC based) design tool
An overview of the ARM11 interrupt features, the factors contributing to low interrupt latency and an understanding of the ARMv6 re-startable instructions
Introduction to ARM TrustZone technology and its features• The new ARM secure mode and its functionality
Principles of the Intelligent Energy Manager (IEM) • Understanding the IEM software and its functions
Overview of clock and reset behaviour and requirements • The different power management modes
Introduction to the ARMv6 memory system • Caching policy and ARM1176 memory management
Necessary steps for booting an ARM1176 processor •Sample bootstrap code.
Integrated debug features of the ARM11 processor family
Key system design considerations • Summary of steps for the integration of an ARM1176 processor
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