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The Designer’s Guide to Verilog

The Verilog HDL is an IEEE standard hardware description language. It is widely used in the design of digital integrated circuits.

Here we provide some useful background information and a tutorial, which explains the basics of Verilog from a hardware designer's perspective. We also provide some useful tips and pointers to other Verilog information on the web site.

Upcoming Live Webinars

What is an SBOM and why should I care?

Wednesday December 11 2024

1 hour session (All Time Zones)

In this webinar we are going to explain in as few words as possible what a Software Bill Of Materials (SBOM) is and why we need to know about them in embedded systems development.

The Keys to SystemC & TLM-2.0

Friday December 13 2024

1 hour session (All Time Zones)

This webinar is aimed at hands-on hardware or software engineers who might know Verilog or C but have no previous experience of SystemC. It will explain what you need to know to be successful with SystemC.

Designing with AMD Kria SOMs

Tuesday December 17 2024

1 hour session (All Time Zones)

This webinar will walk through the design process for using AMD Kria SOMs, including the use of Vivado and Vitis.

C/C++ Memory Management: Design and Debugging

Wednesday December 18 2024

1 hour session (All Time Zones)

This webinar explores best practices for avoiding memory issues in design and debugging memory usage issues in C and C++.

Edge Machine Learning - Project Tips & Tricks

Friday January 17 2025

1 hour session (All Time Zones)

This webinar will provide some useful directions for incorporating machine learning within your next embedded project.