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Xilinx Training Location Details

Class Times

Classes are normally run in training room LC5 between 9am and 5pm

Address of Xilinx Training Venue

Xilinx Headquarters:
Xilinx, Inc.
2100 Logic Drive
San Jose, CA 95124-3400
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Please use visitor car parking in front of Building 4 and register with security at least 10 minutes before the course start time.

Directions from San Jose Airport

  • Take Airport Blvd to Coleman Ave signal light.
  • Turn left and stay in RIGHT HAND LANE.
  • Enter freeway 880 South (to the right).
  • Take 85 South to Gilroy.
  • Exit Union Avenue. Turn LEFT at stop light.
  • Turn LEFT at Union Avenue
  • Turn LEFT at Logic Drive

Directions from San Francisco Airport

  • Take 101 south (San Jose)
  • Take Hwy 85 South (Gilroy)
  • Exit Union Avenue. Turn LEFT at stop light.
  • Turn LEFT at Union Avenue
  • Turn LEFT at Logic Drive

Alternative route from San Francisco Airport

  • Take 101 North (San Francisco)
  • Take 380 junction (San Jose)
  • Exit 280 South to San Jose
  • Take Hwy 85 South (Gilroy)
  • Exit Union Avenue. Turn LEFT at stop light.
  • Turn LEFT at Union Avenue
  • Turn LEFT at Logic Drive

Hotel Information

For your convenience here is a list (in no particular order) of hotels in the vicinity. Please don't forget to request the Xilinx rate at the time of booking.

  • Pruneyard Inn ( 2.5 miles, 5 min), 408-559-4300
  • Toll House (5.0 miles, 10 min), 408-395-7070
  • Campbell Inn (2.6 miles, 6 min), 408-374-4300
  • Carlyle Hotel (1.6 miles, 3 min), 408-559-3600
  • Los Gatos Lodge (3.3 miles, 7 min), 408-354-3300
  • Larkspur Landing - Campbell (3.8 miles. 11 min), 408-364-1514

Upcoming Live Webinars

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Working with Devicetrees

Friday August 08 2025

1 hour session (All Time Zones)

This webinar will demystify how hardware is described by the devicetree and how the Linux kernel can use the data provided by the devicetree description to configure how device drivers talk to the underlying hardware.

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Python Magic Methods

Wednesday August 13 2025

1 hour session (All Time Zones)

This webinar will enable you to sharpen up your Python coding skills as we explore Python magic methods.

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Embedded C++: Dispelling Myths and Pre-conceptions

Friday August 15 2025

1 hour session (All Time Zones)

This webinar aims to resolve any fears you may have of using C++ for embedded applications, by exploring what actually goes on within the compiler…

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Understanding Random Stability in SystemVerilog and UVM

Wednesday August 20 2025

1 hour session (All Time Zones)

This webinar will explain random stability in SystemVerilog and in UVM, the Universal Verification Methodology.

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How to Accelerate Both your FPGA Application and Productivity

Friday August 22 2025

1 hour session (All Time Zones)

This webinar introduces the Vitis-based design methodology that offers a structured approach for all aspects of software development, debug and deployment for individual kernels and complete systems.

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