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Auch bekannt als C-based Design: High-Level Synthesis with Vivado HLS by Xilinx. Früher AutoESL.
Bitte beachten Sie: Hier handelt es sich um ein ONLINE-Training mit LIVE Dozent.
Es behandelt bei ähnlichem Lernerfolg den selben Inhalt wie ein klassisches Training.
| Course Dates: | |||
|---|---|---|---|
| September 30th, 2019 | ONLINE EurAsia | Enquire | |
| October 21st, 2019 | ONLINE Americas | Enquire | |
| indicates CONFIRMED TO RUN courses. | |||
Tuesday December 17 2024
1 hour session (All Time Zones)
This webinar will walk through the design process for using AMD Kria SOMs, including the use of Vivado and Vitis.
Wednesday December 18 2024
1 hour session (All Time Zones)
This webinar explores best practices for avoiding memory issues in design and debugging memory usage issues in C and C++.
Wednesday January 15 2025
30 minute session (All Time Zones)
This webinar will explore the effects of routing vias and connector plated through holes on very high data rate signals using actual test results from as-built PCBs.
Friday January 17 2025
1 hour session (All Time Zones)
This webinar will provide some useful directions for incorporating machine learning within your next embedded project.