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Deep Learning with FPGAs

1 hour session (All Time Zones)
Presenter: John Aynsley

Co-Founder and Technical Fellow

Asia and Europe

Time: 10-11am (BST) 11am-12pm (CEST) 2.30-3.30pm (IST)

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Americas

Time: 10-11am (PDT) 11am-12pm (MDT) 12-1pm (CDT) 1-2pm (EDT)

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Webinar Overview:

Machine Learning and Deep Learning are everywhere, with new algorithms, new applications, new platforms, and new engines appearing all the time. In this webinar we take a look at Deep Learning with particular emphasis on the use of FPGAs as inference engines for convolutional neural networks.

In this webinar you will learn about:

  • The basics of neural network training and inference
  • The basics of the convolutional neural network
  • Considerations when implementing ML/DL inference at the edge
  • The AMD FPGA hardware and software stack for Deep Learning inference at the edge, as provided within the Vitis AI Development Kit
John Aynsley

John Aynsley Doulos Co-Founder and Technical Fellow, John Aynsley, will be presenting this training webinar, which will consist of a one-hour session and be interactive with Q&A participation from attendees.

Attendance is free of charge

If you have any queries, please contact webinars@doulos.com

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