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Arm Cortex-M7 SoC Design

Standard Level - 3 days

This course is designed for those who are designing hardware based around the Arm® Cortex®-M7 core. Including an introduction to the Arm product range and supporting IP, the course covers the Armv7-M instruction set and exception handling, Cortex-M7 implementation, power management, memory protection and AMBA on-chip bus architecture. The Cortex-M7 debug architecture is also covered. The course includes a number of worked examples to reinforce the lecture material. 

Hardware design engineers who need to understand the issues involved when designing SoC's around the Arm Cortex-M7 core.

  • Some knowledge of embedded systems
  • Familiarity with digital logic and hardware/ASIC design issues
  • A basic awareness of Arm is useful but not essential

This class uses training materials developed by Arm®

  • Cortex-M7 Overview
  • Armv7-M Programmers’ Model
  • Armv7-M Assembly Programming
  • Cortex-M7 Processor
  • AHB-Lite
  • APB
  • AXI Protocol
  • AXI Interconnection Architectures
  • Cortex-M7 L1 Sub-Systems
  • Cortex-M7 L2 Interfaces
  • Cortex-M7 Clocks, Resets, Power
  • Armv7-M Exception Handling
  • SysTick Timer
  • Armv7-M Memory Model
  • Armv7-M Memory Protection Unit
  • Introduction to CoreSight
  • Armv7-M Debug
  • Cortex-M7 Implementation
  • Cortex-M7 Integration
  • Armv7-M Extensions (Optional)


Arm and Cortex are registered trade marks of Arm Holdings Plc.

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