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Arm Cortex-R8 MPCore Software Design

Duration: 4 days

This course is available Live Online worldwide: View the Live Online full course description »

This training course is ideal for engineers involved in developing software for platforms powered by the Arm® Cortex®-R8 real-time processors.

Hands-on Labs

The learning is reinforced with unique Lab exercises which are run inside a self contained virtual machine environment. This allows the student to experience a real-life and project-ready development environment without the complexity of installing complex software prior to the class. This virtual machine is for the student to keep after the training class, allowing you to further experiment with embedded software development once the class has come to completion.

This course is aimed at software developers writing low level and bare-metal code for Armv7-R processors, concentrating on the Cortex-R8 processor. Operating system developers who need to understand the details of the Arm v7-R processors' architecture.

Delegates should have some understanding of embedded programming in C and assembler. Knowledge of other processors is a benefit but is not strictly required for attending this class.

This class uses training materials developed by Arm® and is complemented by Doulos' own lecture and laboratory material. This offers the students a well rounded and practical view of the topics covering both the Processor's features along with how to program it.

Introduction to the Arm Architecture

Architecture versions • Registers and instruction sets • Exception model • Memory model • Coprocessors • Architecture extensions • The Future  

Software's Guide to Cortex-R8

Cortex-R8 • MPCore • Overview • Operational modes • Level 1 Memory system • Level 2 Interface • Multiprocessing features  

ArmV7-A/R ISA Overview

Load/Store • Data Processing • Flow Control • Misc • DSP  

Exception Handling

Introduction • Interrupts • Abort Handlers • SVC Handlers • Undef • Handlers • Reset Handlers  

Caches and TCMs

Cache basics • Caches on Arm processors • Tightly Coupled Memory (TCM) • Optimization considerations  


Introduction to atomicity • Load exclusive and store exclusive instructions • Code examples • Multi-core, coherency • Exclusive reservation granule  

Using the Memory Protection Unit

Types & Attributes • Memory Protection Unit (MPU)  

Understanding Barriers

Data barriers • Instruction barriers  

Power Management for Cortex-A/R Cores

Processor Power Consumption • Power Modes • NEON and MPCore  

Embedded Software Development

Semihosting / retargeting • Mixing C/C++ and assembly • Application Startup • Tailoring image memory map to your target • Accessing memory mapped peripherals • Additional considerations  

GICv1 & GICv2 Programming

Distributor and CPU Interfaces • How to enable and configure interrupts • How to handle interrupts • How to send software interrupts • Security Extensions 


Invasive Debug • Non-Invasive Debug • PMU • Trace  

GNU Compiler Hints and Tips

Basic Compilation • Compiler Optimizations • Coding Considerations • Local and Global Data Issues  

GNU Linker Hints and Tips

Linking Basics • System and User Libraries • Linker Script • Veneer and Interworking • Linker Optimizations and Diagnostics • GNU Embedded Development Libraries

The learning is reinforced with unique Lab exercises using the QEMU virtual platform and covering assembly programming and bringing a complete bare metal system to life. Lab exercises for assembly programming cover the concepts of data transfer, data processing, flow control and DSP instructions, and rely on a combination of GNU compilation tools, GDB and an instruction set simulator used for fast prototyping. Additional exercises show the main steps involved in bringing a bare metal system to life, including the configuration of the various mode stacks and the creation of an interrupt handler. These exercises make use of the assembler and linker as well as the interactive debugger (GDB/DDD and QEMU).


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