Let's review default binding before we go any further. In default binding, the chip socket (component declaration) carries a chip (design entity) of the same name (say, AOI) as we've already seen. The chip is inserted into the socket courtesy of a component instantiation and a configuration declaration. If we omit the configuration or if we use a default configuration, the socket and chip must have the same name.
If we want to choose a particular die (architecture) for our chip, we must specify the architecture in the configuration.
Now. Suppose we want to create a general-purpose socket and at some later time, we want to specify which chip will be plugged into the socket. To do this requires a late-binding configuration declaration.
Late binding
The syntax is really no different than before except that we choose a different chip name for the bound design entity, it does not have to be the same as the component declaration. Let us suppose that a spec change (happens too often, doesn't it?) is required. The spec change requires a 4-input AND gate rather than a 2-input multiplexer. One way to tackle this requirement is to use late binding. This requires no change to the MUX2 at all except in the configuration. So, in a hardware sense, we're extracting the AOI gate from its socket and inserting a 4-input AND gate.
Late-binding configuration of MUX2
use WORK.all;
configuration AND4_CFG of MUX2 is
for STRUCTURE
for G2 : AOI
use entity work.AND4(quick_fix);
-- architecture quick_fix of AND4 specified for AOI component
end for;
end for;
end AND4_CFG;