Arm Cortex-R52 Software Design

This course is designed for software engineers writing application and system software for platforms using the Cortex-R52 processor.

• Some basic C programming knowledge
• Experience of assembler programming is not required but would be beneficial
• Some knowledge of embedded systems
• A basic awareness of Arm is useful but not essential

The training materials for this class are based on Arm's own material.
Doulos is a global Arm Approved Training Center.

Day 1

• Armv8-R Architecture Overview
Core registers • Exception model • Instruction sets • Memory model • Coprocessors • Virtualization

• Software Engineer's Guide to Cortex-R52
Cortex-R52 Overview • Memory system • Safety features • Multiprocessing features

• ISA Overview
Load/Store instructions • Data Processing instructions • Flow Control instructions • Misc instructions • DSP instructions • New A32 / T32 instructions

• Exception Handling
Introduction • Interrupts • Abort Handlers • SVC Handlers • HVC / Trap Handlers • Undef Handlers • Reset Handlers

Day 2

• Caches and TCMs
Cache basics • Caches on Arm processors • Tightly Coupled Memory (TCM) • Optimization considerations

• Armv8-R Using the Memory Protection Unit
Memory types • Memory attributes • Alignment & Endianess • Armv8-R MPU

• Armv8-R Synchronization
Synchronization in Armv8-R • Local and Global Exclusive Monitors • Hardware clock gating

• Understanding Barriers
Data barriers • Instruction barriers • Barriers in Armv8-R

Day 3

• Armv8-R Virtualization
Introduction to virtualization • What and why • Virtualization in Armv8-R

• Writing C for Arm
Parameter passing • Floating point linkage • Alignment • Coding considerations

• Booting a Cortex-R52 Processor
Overview • Booting a single core • Booting a cluster

• GICv3 Programming
Interrupts and interfaces • Configuring interrupts SPIs, PPIs and SGIs • Handling interrupts • Software generated interrupts • Power management • Virtualization

• Armv8-R Debug
Introduction to Debug • Types of Debug • Debug Facilities • External Debug • Self-hosted Debug • CoreSight • Debug Features • Trace

The learning is reinforced with unique Lab exercises using the QEMU virtual platform and covering assembly programming and bringing a complete bare metal system to life. Lab exercises for assembly programming cover the concepts of data transfer, data processing, flow control and DSP instructions, and rely on a combination of GNU compilation tools, GDB and an instruction set simulator used for fast prototyping. Additional exercises show the main steps involved in bringing a bare metal system to life, including the configuration of the various mode stacks and the creation of an interrupt handler. These exercises make use of the assembler and linker as well as the interactive debugger (GDB/DDD and QEMU).