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This course is designed for engineers developing software for platforms based around the Arm® Cortex®-R7 MPCore processor. The course highlights the core architecture details and programmer's model. Topics include details of the available caching schemes and coherency management, memory management and the Arm memory model. Additionally, the Arm assembly section delivers the essential knowledge required for programming and debugging with T32 (Thumb2) and A32 (Arm) assembly languages.
Hands-on Labs
The learning is reinforced with unique Lab exercises using the QEMU virtual platform. It covers assembly programming to bring a complete bare metal system to life as well as writing bare metal device drivers.
Software engineers writing application and system software for platforms using the Arm Cortex-M7 processor core.
This class uses training materials developed by Arm and is complemented by Doulos' own lecture and laboratory material. This offers the students a well rounded and practical view of the topics covering both the Processor's features along with how to program it.
Block diagram • Micro-architectural features • Instruction set • Memory interfaces • System buses • TCM/Caches • Memory protection • Pipeline features • Lock-step operation
Introduction • Data Types • Core Registers • Modes, privilege and stacks • Exceptions • Instruction Set Overview • Programming standards
Introduction • Data Processing Instructions • Load/Store Instructions • Flow Control • Miscellaneous
Introduction • Memory Address Space • Memory Types and Attributes • Alignment and Endianness • Barriers
Memory Protection Overview • Memory Regions • Region Attribute Control • Region Overlapping • Sub-region Support • Setting up the MPU
Semihosting / retargeting • Mixing C/C++ and assembly • Application Startup • Tailoring image memory map to your target • Accessing memory mapped peripherals • Additional considerations
Basic Compilation • Compiler Optimizations • Coding Considerations • Local and Global Data Issues
Linking Basics • System and User Libraries • Linker Script • Veneer and Interworking • Linker Optimizations and Diagnostics • GNU Embedded Development Libraries
Introduction • Exception Model • Exception Entry and Exit Behavior • Prioritization and Control • Interrupt Sensitivity • Writing the Vector Table and Interrupt Handlers • Internal Exceptions and RTOS Support • Fault Exceptions
Introduction • CMSIS-Core • CMSIS-DSP • CMSIS-Driver • CMSIS-RTOS • CMSIS-SVD • CMSIS-Pack • CMSIS-DAP
Caches • Cache Fundamentals • Cortex-M7 L1 Cache Sub-system • Tightly Coupled Memory (TCM) • System Considerations
Introduction to Debug • Debug • Events and Reset • Flash Patch and Breakpoint Unit (FPB) • Data Watchpoint and Trace Unit (DWT) • Instrumentation Trace Macrocell (ITM) • Embedded Trace Macrocell (ETM) • Trace Port Interface Unit (TPIU), Trace Packets, Timestamping & Trace Bandwidth
Processor Pipeline • Execution Pipelines • Prefetch Unit • Memory-mapped Registers
Extensions Overview • DSP Extension • Floating-point Extension
Our hands-on exercises are provided as a self-contained virtual machine that can easily be taken away by the students by the end of the class. Our virtual machine works on most operating systems and features a full pre-configured embedded development environment based in industry de-facto standards such as GNU tools and Eclipse. The laboratories work both on pre-installed instruction set simulators and the supplied microcontroller development boards.
The exercises cover a large spectrum of topics:
STM32L552 Evaluation Board
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